intel_ddi_init_dp_buf_reg(intel_encoder);
 
+               WARN_ON(intel_dp->active_streams != 0);
+               intel_dp->active_streams++;
+
                intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
                intel_dp_start_link_train(intel_dp);
                if (port != PORT_A || INTEL_INFO(dev_priv)->gen >= 9)
                intel_psr_disable(intel_dp);
                intel_edp_backlight_off(intel_dp);
        }
+
+       if (type == INTEL_OUTPUT_DP || type == INTEL_OUTPUT_EDP) {
+               struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+
+               intel_dp->active_streams--;
+               WARN_ON(intel_dp->active_streams != 0);
+       }
 }
 
 bool bxt_ddi_phy_is_enabled(struct drm_i915_private *dev_priv,
 
                                    lane_mask);
        }
 
+       WARN_ON(intel_dp->active_streams != 0);
+       intel_dp->active_streams++;
+
        intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
        intel_dp_start_link_train(intel_dp);
        intel_dp_stop_link_train(intel_dp);
 
        DRM_DEBUG_KMS("\n");
 
+       intel_dp->active_streams--;
+       WARN_ON(intel_dp->active_streams != 0);
+
        if ((IS_GEN7(dev) && port == PORT_A) ||
            (HAS_PCH_CPT(dev) && port != PORT_A)) {
                DP &= ~DP_LINK_TRAIN_MASK_CPT;
                if (bret == true) {
 
                        /* check link status - esi[10] = 0x200c */
-                       if (intel_dp->active_mst_links &&
+                       if (intel_dp->active_streams &&
                            !drm_dp_channel_eq_ok(&esi[10], intel_dp->lane_count)) {
                                DRM_DEBUG_KMS("channel EQ not ok, retraining\n");
                                intel_dp_start_link_train(intel_dp);
 
        struct intel_dp *intel_dp = &intel_dig_port->dp;
        int ret;
 
-       DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
+       DRM_DEBUG_KMS("%d\n", intel_dp->active_streams);
 
        drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->connector->port);
 
        struct intel_digital_port *intel_dig_port = intel_mst->primary;
        struct intel_dp *intel_dp = &intel_dig_port->dp;
 
-       DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
+       DRM_DEBUG_KMS("%d\n", intel_dp->active_streams);
 
        /* this can fail */
        drm_dp_check_act_status(&intel_dp->mst_mgr);
 
        drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->connector->port);
 
-       intel_dp->active_mst_links--;
+       intel_dp->active_streams--;
 
        intel_mst->connector = NULL;
-       if (intel_dp->active_mst_links == 0) {
+       if (intel_dp->active_streams == 0) {
                intel_dig_port->base.post_disable(&intel_dig_port->base);
                intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
        }
         */
        found->encoder = encoder;
 
-       DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
+       DRM_DEBUG_KMS("%d\n", intel_dp->active_streams);
 
        intel_mst->connector = found;
 
-       if (intel_dp->active_mst_links == 0) {
+       if (intel_dp->active_streams == 0) {
                intel_ddi_clk_select(&intel_dig_port->base, intel_crtc->config);
 
                intel_prepare_dp_ddi_buffers(&intel_dig_port->base);
        }
 
 
-       intel_dp->active_mst_links++;
+       intel_dp->active_streams++;
        temp = I915_READ(DP_TP_STATUS(port));
        I915_WRITE(DP_TP_STATUS(port), temp);
 
        enum port port = intel_dig_port->port;
        int ret;
 
-       DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
+       DRM_DEBUG_KMS("%d\n", intel_dp->active_streams);
 
        if (intel_wait_for_register(dev_priv,
                                    DP_TP_STATUS(port),