drivers: net: cpsw: enable interrupts after napi enable and clearing previous interrupts

When the Ethernet interface is put down and up with heavy Ethernet
traffic, then there is prossibility of an interrupt waiting in irq
controller to be processed, so when the interface is brought up again
just after enable interrupt, it goes to ISR due to the previous
unhandled interrutp and in ISR napi is not scheduled as the napi
is not enabled in ndo_open which results in disabled interrupt for
CPSW and no packets are received in cpsw. So this patch moves enabling
of interupts after napi_enable and clearing CPDMA interrupts.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index 4e3d197ce55a9aabdf9a80ae88ab7acf334a4d0b..36aa109416c4c3a387a440795a8d3611cf3d4ded 100644 (file)
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -1252,6 +1252,12 @@ static int cpsw_ndo_open(struct net_device *ndev)
                cpsw_set_coalesce(ndev, &coal);
        }
 
+       napi_enable(&priv->napi);
+       cpdma_ctlr_start(priv->dma);
+       cpsw_intr_enable(priv);
+       cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_RX);
+       cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_TX);
+
        prim_cpsw = cpsw_get_slave_priv(priv, 0);
        if (prim_cpsw->irq_enabled == false) {
                if ((priv == prim_cpsw) || !netif_running(prim_cpsw->ndev)) {
@@ -1260,12 +1266,6 @@ static int cpsw_ndo_open(struct net_device *ndev)
                }
        }
 
-       napi_enable(&priv->napi);
-       cpdma_ctlr_start(priv->dma);
-       cpsw_intr_enable(priv);
-       cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_RX);
-       cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_TX);
-
        if (priv->data.dual_emac)
                priv->slaves[priv->emac_port].open_stat = true;
        return 0;