struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
        psp_memory_training_fini(&adev->psp);
-       release_firmware(adev->psp.sos_fw);
-       adev->psp.sos_fw = NULL;
-       release_firmware(adev->psp.asd_fw);
-       adev->psp.asd_fw = NULL;
-       release_firmware(adev->psp.ta_fw);
-       adev->psp.ta_fw = NULL;
+       if (adev->psp.sos_fw) {
+               release_firmware(adev->psp.sos_fw);
+               adev->psp.sos_fw = NULL;
+       }
+       if (adev->psp.asd_fw) {
+               release_firmware(adev->psp.asd_fw);
+               adev->psp.asd_fw = NULL;
+       }
+       if (adev->psp.ta_fw) {
+               release_firmware(adev->psp.ta_fw);
+               adev->psp.ta_fw = NULL;
+       }
 
        if (adev->asic_type == CHIP_NAVI10)
                psp_sysfs_fini(adev);
        return ret;
 }
 
+static bool psp_skip_tmr(struct psp_context *psp)
+{
+       switch (psp->adev->asic_type) {
+       case CHIP_NAVI12:
+       case CHIP_SIENNA_CICHLID:
+               return true;
+       default:
+               return false;
+       }
+}
+
 static int psp_tmr_load(struct psp_context *psp)
 {
        int ret;
        struct psp_gfx_cmd_resp *cmd;
 
+       /* For Navi12 and CHIP_SIENNA_CICHLID SRIOV, do not set up TMR.
+        * Already set up by host driver.
+        */
+       if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp))
+               return 0;
+
        cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
        if (!cmd)
                return -ENOMEM;