static void ata_bmdma_fill_sg(struct ata_queued_cmd *qc)
 {
        struct ata_port *ap = qc->ap;
+       struct ata_bmdma_prd *prd = ap->bmdma_prd;
        struct scatterlist *sg;
        unsigned int si, pi;
 
                        if ((offset + sg_len) > 0x10000)
                                len = 0x10000 - offset;
 
-                       ap->prd[pi].addr = cpu_to_le32(addr);
-                       ap->prd[pi].flags_len = cpu_to_le32(len & 0xffff);
+                       prd[pi].addr = cpu_to_le32(addr);
+                       prd[pi].flags_len = cpu_to_le32(len & 0xffff);
                        VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
 
                        pi++;
                }
        }
 
-       ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
+       prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
 }
 
 /**
 static void ata_bmdma_fill_sg_dumb(struct ata_queued_cmd *qc)
 {
        struct ata_port *ap = qc->ap;
+       struct ata_bmdma_prd *prd = ap->bmdma_prd;
        struct scatterlist *sg;
        unsigned int si, pi;
 
                                len = 0x10000 - offset;
 
                        blen = len & 0xffff;
-                       ap->prd[pi].addr = cpu_to_le32(addr);
+                       prd[pi].addr = cpu_to_le32(addr);
                        if (blen == 0) {
                                /* Some PATA chipsets like the CS5530 can't
                                   cope with 0x0000 meaning 64K as the spec
                                   says */
-                               ap->prd[pi].flags_len = cpu_to_le32(0x8000);
+                               prd[pi].flags_len = cpu_to_le32(0x8000);
                                blen = 0x8000;
-                               ap->prd[++pi].addr = cpu_to_le32(addr + 0x8000);
+                               prd[++pi].addr = cpu_to_le32(addr + 0x8000);
                        }
-                       ap->prd[pi].flags_len = cpu_to_le32(blen);
+                       prd[pi].flags_len = cpu_to_le32(blen);
                        VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
 
                        pi++;
                }
        }
 
-       ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
+       prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
 }
 
 /**
 
        /* load PRD table addr. */
        mb();   /* make sure PRD table writes are visible to controller */
-       iowrite32(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
+       iowrite32(ap->bmdma_prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
 
        /* specify data direction, triple-check start bit is clear */
        dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
 int ata_bmdma_port_start(struct ata_port *ap)
 {
        if (ap->mwdma_mask || ap->udma_mask) {
-               ap->prd = dmam_alloc_coherent(ap->host->dev, ATA_PRD_TBL_SZ,
-                                             &ap->prd_dma, GFP_KERNEL);
-               if (!ap->prd)
+               ap->bmdma_prd =
+                       dmam_alloc_coherent(ap->host->dev, ATA_PRD_TBL_SZ,
+                                           &ap->bmdma_prd_dma, GFP_KERNEL);
+               if (!ap->bmdma_prd)
                        return -ENOMEM;
        }
 
 
 
        /* load PRD table addr. */
        mb();   /* make sure PRD table writes are visible to controller */
-       iowrite32(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
+       iowrite32(ap->bmdma_prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
 
        /* specify data direction, triple-check start bit is clear */
        dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
 
        void __iomem *mmio = ap->ioaddr.bmdma_addr;
 
        /* load PRD table addr */
-       out_be32(mmio + SCC_DMA_TABLE_OFS, ap->prd_dma);
+       out_be32(mmio + SCC_DMA_TABLE_OFS, ap->bmdma_prd_dma);
 
        /* specify data direction, triple-check start bit is clear */
        dmactl = in_be32(mmio + SCC_DMA_CMD);
        if (rc)
                return rc;
 
-       out_be32(mmio + SCC_DMA_PTERADD, ap->prd_dma);
+       out_be32(mmio + SCC_DMA_PTERADD, ap->bmdma_prd_dma);
        return 0;
 }
 
 
 };
 
 struct nv_swncq_port_priv {
-       struct ata_prd  *prd;    /* our SG list */
+       struct ata_bmdma_prd *prd;       /* our SG list */
        dma_addr_t      prd_dma; /* and its DMA mapping */
        void __iomem    *sactive_block;
        void __iomem    *irq_block;
        struct ata_port *ap = qc->ap;
        struct scatterlist *sg;
        struct nv_swncq_port_priv *pp = ap->private_data;
-       struct ata_prd *prd;
+       struct ata_bmdma_prd *prd;
        unsigned int si, idx;
 
        prd = pp->prd + ATA_MAX_PRD * qc->tag;
 
 static void pdc_atapi_pkt(struct ata_queued_cmd *qc)
 {
        struct ata_port *ap = qc->ap;
-       dma_addr_t sg_table = ap->prd_dma;
+       dma_addr_t sg_table = ap->bmdma_prd_dma;
        unsigned int cdb_len = qc->dev->cdb_len;
        u8 *cdb = qc->cdb;
        struct pdc_port_priv *pp = ap->private_data;
 static void pdc_fill_sg(struct ata_queued_cmd *qc)
 {
        struct ata_port *ap = qc->ap;
+       struct ata_bmdma_prd *prd = ap->bmdma_prd;
        struct scatterlist *sg;
        const u32 SG_COUNT_ASIC_BUG = 41*4;
        unsigned int si, idx;
                        if ((offset + sg_len) > 0x10000)
                                len = 0x10000 - offset;
 
-                       ap->prd[idx].addr = cpu_to_le32(addr);
-                       ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
+                       prd[idx].addr = cpu_to_le32(addr);
+                       prd[idx].flags_len = cpu_to_le32(len & 0xffff);
                        VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
 
                        idx++;
                }
        }
 
-       len = le32_to_cpu(ap->prd[idx - 1].flags_len);
+       len = le32_to_cpu(prd[idx - 1].flags_len);
 
        if (len > SG_COUNT_ASIC_BUG) {
                u32 addr;
 
                VPRINTK("Splitting last PRD.\n");
 
-               addr = le32_to_cpu(ap->prd[idx - 1].addr);
-               ap->prd[idx - 1].flags_len = cpu_to_le32(len - SG_COUNT_ASIC_BUG);
+               addr = le32_to_cpu(prd[idx - 1].addr);
+               prd[idx - 1].flags_len = cpu_to_le32(len - SG_COUNT_ASIC_BUG);
                VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx - 1, addr, SG_COUNT_ASIC_BUG);
 
                addr = addr + len - SG_COUNT_ASIC_BUG;
                len = SG_COUNT_ASIC_BUG;
-               ap->prd[idx].addr = cpu_to_le32(addr);
-               ap->prd[idx].flags_len = cpu_to_le32(len);
+               prd[idx].addr = cpu_to_le32(addr);
+               prd[idx].flags_len = cpu_to_le32(len);
                VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
 
                idx++;
        }
 
-       ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
+       prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
 }
 
 static void pdc_qc_prep(struct ata_queued_cmd *qc)
                pdc_fill_sg(qc);
                /*FALLTHROUGH*/
        case ATA_PROT_NODATA:
-               i = pdc_pkt_header(&qc->tf, qc->ap->prd_dma,
+               i = pdc_pkt_header(&qc->tf, qc->ap->bmdma_prd_dma,
                                   qc->dev->devno, pp->pkt);
                if (qc->tf.flags & ATA_TFLAG_LBA48)
                        i = pdc_prep_lba48(&qc->tf, pp->pkt, i);
 
        void __iomem *bmdma = ap->ioaddr.bmdma_addr;
 
        /* load PRD table addr. */
-       iowrite32(ap->prd_dma, bmdma + ATA_DMA_TABLE_OFS);
+       iowrite32(ap->bmdma_prd_dma, bmdma + ATA_DMA_TABLE_OFS);
 
        /* issue r/w command */
        ap->ops->sff_exec_command(ap, &qc->tf);
 {
        struct scatterlist *sg;
        struct ata_port *ap = qc->ap;
-       struct ata_prd *prd, *last_prd = NULL;
+       struct ata_bmdma_prd *prd, *last_prd = NULL;
        unsigned int si;
 
-       prd = &ap->prd[0];
+       prd = &ap->bmdma_prd[0];
        for_each_sg(qc->sg, sg, qc->n_elem, si) {
                /* Note h/w doesn't support 64-bit, so we unconditionally
                 * truncate dma_addr_t to u32.
 
 
        /* load PRD table addr. */
        mb();   /* make sure PRD table writes are visible to controller */
-       writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
+       writel(ap->bmdma_prd_dma, mmio + ATA_DMA_TABLE_OFS);
 
        /* specify data direction, triple-check start bit is clear */
        dmactl = readb(mmio + ATA_DMA_CMD);
 
 
 /* core structures */
 
-struct ata_prd {
+struct ata_bmdma_prd {
        __le32                  addr;
        __le32                  flags_len;
 };
 
        unsigned int            print_id; /* user visible unique port ID */
        unsigned int            port_no; /* 0 based port no. inside the host */
 
-       struct ata_prd          *prd;    /* our SG list */
-       dma_addr_t              prd_dma; /* and its DMA mapping */
-
 #ifdef CONFIG_ATA_SFF
        struct ata_ioports      ioaddr; /* ATA cmd/ctl/dma register blocks */
        u8                      ctl;    /* cache of ATA control register */
        u8                      last_ctl;       /* Cache last written value */
        struct delayed_work     sff_pio_task;
+       struct ata_bmdma_prd    *bmdma_prd;     /* BMDMA SG list */
+       dma_addr_t              bmdma_prd_dma;  /* and its DMA mapping */
 #endif /* CONFIG_ATA_SFF */
 
        unsigned int            pio_mask;