ARM: dts: lan966x: Fix the interrupt number for internal PHYs

According to the datasheet the interrupts for internal PHYs are
80 and 81.

Fixes: 6ad69e07def67c ("ARM: dts: lan966x: add MIIM nodes")
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220912192629.461452-1-horatiu.vultur@microchip.com

diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
index 894bf9da19a4bc038fd2613ebfa79b91b50ba329..0bf8187134227eb99c646a5a00314f821b0d88e2 100644 (file)
--- a/arch/arm/boot/dts/lan966x.dtsi
+++ b/arch/arm/boot/dts/lan966x.dtsi
@@ -541,13 +541,13 @@
 
                        phy0: ethernet-phy@1 {
                                reg = <1>;
-                               interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
                                status = "disabled";
                        };
 
                        phy1: ethernet-phy@2 {
                                reg = <2>;
-                               interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
                                status = "disabled";
                        };
                };