/*
- * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* Update when new operations are added or otherwise
* backward compatible changes are made
*/
-#define EPSC_MINOR_VERSION 5
+#define EPSC_MINOR_VERSION 6
/*
* Macros for EPSC API #if checking in code
* Macro to conver 16 bit sequence number to 64 bit wire format
*/
#define EPSC_STATUS_16_to_64(s) ((((u64)(s)) << 0) | (((u64)(s)) << 16) | \
- (((u64)(s)) << 32) | ((((u64)s)) << 48))
+ (((u64)(s)) << 32) | ((((u64)s)) << 48))
/*
* Macros to force layout to match HW implementation
*/
/*
- * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
*/
#ifndef _PSIF_ENDIAN_H
/*
- * Copyright (c) 2015, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015, Oracle and/or its affiliates. All rights reserved.
*
* THIS FILE IS AUTOMATICALLY GENERATED & MANUALLY SCRUBBED. DO NOT EDIT
*/
/*
- * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
PSIF_EPSC_CSR_UPDATE_OPCODE_EXTENT = 0x8u,
PSIF_EPSC_FLASH_SLOT_EXTENT = 0x6u,
PSIF_EPSC_UPDATE_SET_EXTENT = 0x5u,
- PSIF_EPSC_CSR_UF_CTRL_OPCODE_EXTENT = 0x9u,
+ PSIF_EPSC_CSR_UF_CTRL_OPCODE_EXTENT = 0xbu,
PSIF_EPSC_VIMMA_CTRL_OPCODE_EXTENT = 0x8u,
PSIF_EPSC_VIMMA_ADMMODE_EXTENT = 0x2u,
PSIF_EPSC_CSR_PMA_COUNTERS_ENUM_EXTENT = 0x17u,
EPSC_UF_CTRL_GET_HIGHEST_QP_IDX,
/** Reset the highest QP number cache for the given UF */
EPSC_UF_CTRL_RESET_HIGHEST_QP_IDX,
+ /** Retrieve the current UF settings for SMP enable */
+ EPSC_UF_CTRL_GET_SMP_ENABLE,
+ /** Retrieve the current UF settings for vlink connect */
+ EPSC_UF_CTRL_GET_VLINK_CONNECT,
/* Padding out to required bits allocated */
PSIF_EPSC_CSR_UF_CTRL_OPCODE_FIELD_MAX = 0x7fffffffu
}; /* enum psif_epsc_csr_uf_ctrl_opcode [32 bits] */
PSIF_EPSC_VIMMA_CTRL_OPCODE_FIELD_MAX = 0x7fffffffu
}; /* enum psif_epsc_vimma_ctrl_opcode [32 bits] */
-
+/** \brief IB admin modes supported by VIMMA
+ * \details
+ * VIMMA IB admin mode defines the way the VF will be configured
+ * by the fabric, either by SM alone, or by SM/VIMM combo.
+ * \par Classification
+ * external
+ */
enum psif_epsc_vimma_admmode {
+ /** SM only mode is default and behaves according to IBTA standard */
EPSC_VIMMA_CTRL_IB_ADM_MODE_SM_STANDARD,
- /* VFP used as short for VM Fabric Profile */
+ /** VFP mode requires support of a VIMM service in the fabric.
+ * VFP = VM Fabric Profile
+ */
EPSC_VIMMA_CTRL_IB_ADM_MODE_VM_FABRIC_PROFILE,
/* Padding out to required bits allocated */
PSIF_EPSC_VIMMA_ADMMODE_FIELD_MAX = 0xffffu
/*
- * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* external
*/
struct psif_epsc_csr_vimma_ctrl {
- /* VIMMA sub-opcodes triggered by EPSC_VIMMA_CTRL */
+ /** VIMMA sub-opcodes triggered by EPSC_VIMMA_CTRL */
enum psif_epsc_vimma_ctrl_opcode opcode:32;
/* length of DMA response buffer pinned in host memory */
u32 length;
- /* Size 5*64 bits: union of the params for the various opcodes */
+ /** Size 5*64 bits: union of the params for the various opcodes */
union psif_epsc_vimma_ctrl_cmd u;
- /* Size 64 bits */
+ /** Size 64 bits */
struct psif_mmu_cntx mmu_cntx;
- /* Place to DMA back longer responses during retrieval */
+ /** Place to DMA back longer responses during retrieval */
u64 host_addr;
/* Summing up to 11 * u64 which is total and max */
u64 reserved[3];
/*
- * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
struct psif_epsc_csr_vimma_ctrl {
/* length of DMA response buffer pinned in host memory */
u32 length;
- /* VIMMA sub-opcodes triggered by EPSC_VIMMA_CTRL */
+ /** VIMMA sub-opcodes triggered by EPSC_VIMMA_CTRL */
enum psif_epsc_vimma_ctrl_opcode opcode:32;
- /* Size 5*64 bits: union of the params for the various opcodes */
+ /** Size 5*64 bits: union of the params for the various opcodes */
union psif_epsc_vimma_ctrl_cmd u;
- /* Size 64 bits */
+ /** Size 64 bits */
struct psif_mmu_cntx mmu_cntx;
- /* Place to DMA back longer responses during retrieval */
+ /** Place to DMA back longer responses during retrieval */
u64 host_addr;
/* Summing up to 11 * u64 which is total and max */
u64 reserved[3];
/*
- * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
/*
- * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
/*
- * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
/*
- * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
return "EPSC_UF_CTRL_GET_HIGHEST_QP_IDX";
case EPSC_UF_CTRL_RESET_HIGHEST_QP_IDX:
return "EPSC_UF_CTRL_RESET_HIGHEST_QP_IDX";
+ case EPSC_UF_CTRL_GET_SMP_ENABLE:
+ return "EPSC_UF_CTRL_GET_SMP_ENABLE";
+ case EPSC_UF_CTRL_GET_VLINK_CONNECT:
+ return "EPSC_UF_CTRL_GET_VLINK_CONNECT";
case PSIF_EPSC_CSR_UF_CTRL_OPCODE_FIELD_MAX:
return "PSIF_EPSC_CSR_UF_CTRL_OPCODE_FIELD_MAX";
default:
/*
- * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
/*
- * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
/*
- * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
/*
- * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
struct sif_version sif_version = {
.git_repo = "sifdrv [origin/master]",
-.last_commit = "titan_1.0.0.1 transform filters: Replace 'automatically generated'",
+.last_commit = "titan_1.0.0.1-4-g3865298 eq: increase cq_eq_max to 46",
.git_status = """?? drivers/\n"
+"?? drv/sif_epsc.c~\n"
,
-.build_git_time = "Sun, 03 Jul 2016 12:44:15 +0000",
+.build_git_time = "Fri, 15 Jul 2016 07:58:00 +0000",
.build_user = "komang",
.git_psifapi_repo = "psifapi [origin/master]",
-.last_psifapi_commit = "titan_1.0.0.1 EPSC_API_VERSION(2,5) - EPSC_QUERY_HW_REVISION",
+.last_psifapi_commit = "titan_1.0.0.1-3-g7496ad1 EPSC_API_VERSION(2,6) - Adding retrieval of SMP and vlink connect modes",
.git_psifapi_status = "",
};
/* Misc driver release info */
-#define BUILD_DATE "2016-07-03"
-#define BUILD_TIME "12:44:15"
-#define BUILD_EPOCH 1467549855
-#define TITAN_RELEASE "1.0.0.1"
+#define BUILD_DATE "2016-07-15"
+#define BUILD_TIME "07:58:00"
+#define BUILD_EPOCH 1468569480
+#define TITAN_RELEASE "1.0.0.1+4"