riscv: use lw when reading int cpu in asm_per_cpu

REG_L is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
The struct currently has a hole after cpu, so little endian accesses
seemed fine.

Fixes: be97d0db5f44 ("riscv: VMAP_STACK overflow detection thread-safe")
Cc: stable@vger.kernel.org
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
Link: https://lore.kernel.org/r/20250725165410.2896641-5-rkrcmar@ventanamicro.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>

diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
index a8a2af6dfe9d2406625ca8fc94014fe5180e4fec..2a16e88e13deda9961ca0958d0fc9e39d2af1a29 100644 (file)
--- a/arch/riscv/include/asm/asm.h
+++ b/arch/riscv/include/asm/asm.h
@@ -91,7 +91,7 @@
 #endif
 
 .macro asm_per_cpu dst sym tmp
-       REG_L \tmp, TASK_TI_CPU_NUM(tp)
+       lw    \tmp, TASK_TI_CPU_NUM(tp)
        slli  \tmp, \tmp, PER_CPU_OFFSET_SHIFT
        la    \dst, __per_cpu_offset
        add   \dst, \dst, \tmp