#define DEVICE_NAME    "aspeed-lpc-ctrl"
 
+#define HICR5 0x0
+#define HICR5_ENL2H    BIT(8)
+#define HICR5_ENFWH    BIT(10)
+
 #define HICR7 0x8
 #define HICR8 0xc
 
                if (rc)
                        return rc;
 
-               return regmap_write(lpc_ctrl->regmap, HICR8,
-                       (~(map.size - 1)) | ((map.size >> 16) - 1));
+               rc = regmap_write(lpc_ctrl->regmap, HICR8,
+                               (~(map.size - 1)) | ((map.size >> 16) - 1));
+               if (rc)
+                       return rc;
+
+               /*
+                * Enable LPC FHW cycles. This is required for the host to
+                * access the regions specified.
+                */
+               return regmap_update_bits(lpc_ctrl->regmap, HICR5,
+                               HICR5_ENFWH | HICR5_ENL2H,
+                               HICR5_ENFWH | HICR5_ENL2H);
        }
 
        return -EINVAL;