*/
 void mn10300_set_lateack_irq_type(int irq)
 {
-       set_irq_chip_and_handler(irq, &mn10300_cpu_pic_level,
+       irq_set_chip_and_handler(irq, &mn10300_cpu_pic_level,
                                 handle_level_irq);
 }
 
        int irq;
 
        for (irq = 0; irq < NR_IRQS; irq++)
-               if (get_irq_chip(irq) == &no_irq_chip)
+               if (irq_get_chip(irq) == &no_irq_chip)
                        /* due to the PIC latching interrupt requests, even
                         * when the IRQ is disabled, IRQ_PENDING is superfluous
                         * and we can use handle_level_irq() for edge-triggered
                         * interrupts */
-                       set_irq_chip_and_handler(irq, &mn10300_cpu_pic_edge,
+                       irq_set_chip_and_handler(irq, &mn10300_cpu_pic_edge,
                                                 handle_level_irq);
 
        unit_init_IRQ();
 
                NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL));
        set_intr_level(port->tx_irq,
                NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL));
-       set_irq_chip(port->tm_irq, &mn10300_serial_pic);
+       irq_set_chip(port->tm_irq, &mn10300_serial_pic);
 
        if (request_irq(port->rx_irq, mn10300_serial_interrupt,
                        IRQF_DISABLED, port->rx_name, port) < 0)
 
        u16 tmp16;
 
        /* set up the reschedule IPI */
-       set_irq_chip_and_handler(RESCHEDULE_IPI,
-                                &mn10300_ipi_type, handle_percpu_irq);
+       irq_set_chip_and_handler(RESCHEDULE_IPI, &mn10300_ipi_type,
+                                handle_percpu_irq);
        setup_irq(RESCHEDULE_IPI, &reschedule_ipi);
        set_intr_level(RESCHEDULE_IPI, RESCHEDULE_GxICR_LV);
        mn10300_ipi_enable(RESCHEDULE_IPI);
 
        /* set up the call function IPI */
-       set_irq_chip_and_handler(CALL_FUNC_SINGLE_IPI,
-                                &mn10300_ipi_type, handle_percpu_irq);
+       irq_set_chip_and_handler(CALL_FUNC_SINGLE_IPI, &mn10300_ipi_type,
+                                handle_percpu_irq);
        setup_irq(CALL_FUNC_SINGLE_IPI, &call_function_ipi);
        set_intr_level(CALL_FUNC_SINGLE_IPI, CALL_FUNCTION_GxICR_LV);
        mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI);
        /* set up the local timer IPI */
 #if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \
     defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
-       set_irq_chip_and_handler(LOCAL_TIMER_IPI,
-                                &mn10300_ipi_type, handle_percpu_irq);
+       irq_set_chip_and_handler(LOCAL_TIMER_IPI, &mn10300_ipi_type,
+                                handle_percpu_irq);
        setup_irq(LOCAL_TIMER_IPI, &local_timer_ipi);
        set_intr_level(LOCAL_TIMER_IPI, LOCAL_TIMER_GxICR_LV);
        mn10300_ipi_enable(LOCAL_TIMER_IPI);
 
        SyncExBus();
 
        for (irq = NR_CPU_IRQS; irq < NR_IRQS; irq++)
-               set_irq_chip_and_handler(irq, &asb2364_fpga_pic, handle_level_irq);
+               irq_set_chip_and_handler(irq, &asb2364_fpga_pic,
+                                        handle_level_irq);
 
        /* the FPGA drives the XIRQ1 input on the CPU PIC */
        setup_irq(XIRQ1, &fpga_irq[0]);