drm/amd/display: Use dcn1 Optimal Taps Get

[WHY]
dpp2_get_optimal_number_of_taps is incorrect, and dcn2 should be using
dpp1_get_optimal_number_of_taps instead

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c
index d8b2da18db396045f2e94db770b2845cef0977ff..997e9582edc7a5174dc7a52fbf5d955aaa3b2235 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c
@@ -129,7 +129,7 @@ void dpp_set_gamut_remap_bypass(struct dcn10_dpp *dpp)
 
 #define IDENTITY_RATIO(ratio) (dc_fixpt_u2d19(ratio) == (1 << 19))
 
-static bool dpp_get_optimal_number_of_taps(
+bool dpp1_get_optimal_number_of_taps(
                struct dpp *dpp,
                struct scaler_data *scl_data,
                const struct scaling_taps *in_taps)
@@ -521,7 +521,7 @@ static const struct dpp_funcs dcn10_dpp_funcs = {
                .dpp_read_state = dpp_read_state,
                .dpp_reset = dpp_reset,
                .dpp_set_scaler = dpp1_dscl_set_scaler_manual_scale,
-               .dpp_get_optimal_number_of_taps = dpp_get_optimal_number_of_taps,
+               .dpp_get_optimal_number_of_taps = dpp1_get_optimal_number_of_taps,
                .dpp_set_gamut_remap = dpp1_cm_set_gamut_remap,
                .dpp_set_csc_adjustment = dpp1_cm_set_output_csc_adjustment,
                .dpp_set_csc_default = dpp1_cm_set_output_csc_default,

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h
index e2c613611ac95583ce5023f028f78958518ffed2..1d4a7d640334020272f529f9228ac673c54229c3 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h
@@ -1504,6 +1504,11 @@ void dpp1_set_hdr_multiplier(
                struct dpp *dpp_base,
                uint32_t multiplier);
 
+bool dpp1_get_optimal_number_of_taps(
+               struct dpp *dpp,
+               struct scaler_data *scl_data,
+               const struct scaling_taps *in_taps);
+
 void dpp1_construct(struct dcn10_dpp *dpp1,
        struct dc_context *ctx,
        uint32_t inst,

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c
index ae8534308229c196d313efae0b1f60ce5ccf379e..4d7e45892f087ac81db26a2aaff99de449201b99 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c
@@ -457,7 +457,7 @@ static struct dpp_funcs dcn20_dpp_funcs = {
        .dpp_read_state = dpp20_read_state,
        .dpp_reset = dpp_reset,
        .dpp_set_scaler = dpp1_dscl_set_scaler_manual_scale,
-       .dpp_get_optimal_number_of_taps = dpp2_get_optimal_number_of_taps,
+       .dpp_get_optimal_number_of_taps = dpp1_get_optimal_number_of_taps,
        .dpp_set_gamut_remap = dpp1_cm_set_gamut_remap,
        .dpp_set_csc_adjustment = NULL,
        .dpp_set_csc_default = NULL,

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.h
index f8db8ad593f86466afed9ddd1a20a08263991fc2..5b03b737b1d6104f2e95ea6e9780f6e940ce77dc 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.h
@@ -705,11 +705,6 @@ void dpp2_set_hdr_multiplier(
                struct dpp *dpp_base,
                uint32_t multiplier);
 
-bool dpp2_get_optimal_number_of_taps(
-               struct dpp *dpp,
-               struct scaler_data *scl_data,
-               const struct scaling_taps *in_taps);
-
 bool dpp2_construct(struct dcn20_dpp *dpp2,
        struct dc_context *ctx,
        uint32_t inst,