arm64/sysreg: Correct the values for GICv4.1

Currently, sysreg has value as 0b0010 for the presence of GICv4.1 in
ID_PFR1_EL1 and ID_AA64PFR0_EL1, instead of 0b0011 as per ARM ARM.
Hence, correct them to reflect ARM ARM.

Signed-off-by: Raghavendra Rao Ananta <rananta@google.com>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240718215532.616447-1-rananta@google.com
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index a4c1dd4741a470741a88ad37951c5b67e11928c1..7ceaa1e0b4bc25992165eac2f32e147fea465b31 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -149,7 +149,7 @@ Res0        63:32
 UnsignedEnum   31:28   GIC
        0b0000  NI
        0b0001  GICv3
-       0b0010  GICv4p1
+       0b0011  GICv4p1
 EndEnum
 UnsignedEnum   27:24   Virt_frac
        0b0000  NI
@@ -903,7 +903,7 @@ EndEnum
 UnsignedEnum   27:24   GIC
        0b0000  NI
        0b0001  IMP
-       0b0010  V4P1
+       0b0011  V4P1
 EndEnum
 SignedEnum     23:20   AdvSIMD
        0b0000  IMP