]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
drm/amd/display: Add code comments clock and encode code
authorRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Fri, 22 Mar 2024 22:53:14 +0000 (16:53 -0600)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 10 Apr 2024 02:07:02 +0000 (22:07 -0400)
This commit adds some comments to make easier to understand the clock
update for DCN 201, the encode function, and other minor comments.

Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubbub.c
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c
drivers/gpu/drm/amd/display/dc/resource/Makefile

index 9c90090e73518745d87572daf7e76652267e2d67..f77840dd051ed142a8f175d8dc591391250e4e2e 100644 (file)
@@ -100,7 +100,15 @@ static void dcn201_update_clocks(struct clk_mgr *clk_mgr_base,
 
        if (clk_mgr_base->clks.dispclk_khz == 0 ||
            dc->debug.force_clock_mode & 0x1) {
+               /* this is from resume or boot up, if forced_clock cfg option
+                * used, we bypass program dispclk and DPPCLK, but need set them
+                * for S3.
+                */
+
                force_reset = true;
+               /* force_clock_mode 0x1:  force reset the clock even it is the
+                * same clock as long as it is in Passive level.
+                */
 
                dcn2_read_clocks_from_hw_dentist(clk_mgr_base);
        }
@@ -150,11 +158,14 @@ static void dcn201_update_clocks(struct clk_mgr *clk_mgr_base,
 
        if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) {
                if (dpp_clock_lowered) {
+                       // if clock is being lowered, increase DTO before lowering refclk
                        dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);
                        dcn20_update_clocks_update_dentist(clk_mgr, context);
                } else {
+                       // if clock is being raised, increase refclk before lowering DTO
                        if (update_dppclk || update_dispclk)
                                dcn20_update_clocks_update_dentist(clk_mgr, context);
+                       // always update dtos unless clock is lowered and not safe to lower
                        dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);
                }
        }
index 09ea65acb2c439bdb8b1f1f1bab92b746c450e55..63798132ed95b3b60430623b6b44a13a0f3d5c92 100644 (file)
@@ -103,5 +103,5 @@ void hubbub201_construct(struct dcn20_hubbub *hubbub,
        hubbub->masks = hubbub_mask;
 
        hubbub->debug_test_index_pstate = 0xB;
-       hubbub->detile_buf_size = 164 * 1024;
+       hubbub->detile_buf_size = 164 * 1024; /* 164KB for DCN2.0 */
 }
index 45143459eeddcf9a6085249d1a2352f32e514d0f..678db949cfe3ce0a23686c233343409e7a59c0cf 100644 (file)
@@ -474,6 +474,10 @@ static void dcn31_hpo_dp_stream_enc_update_dp_info_packets(
                                &info_frame->hdrsmd,
                                true);
 
+       /* packetIndex 4 is used for send immediate sdp message, and please
+        * use other packetIndex (such as 5,6) for other info packet
+        */
+
        if (info_frame->adaptive_sync.valid)
                enc->vpg->funcs->update_generic_info_packet(
                                enc->vpg,
index 184b1f23aa774ff9f3828275f712d9035884813e..db9048974d7462fe05239f51ce26884a9964288f 100644 (file)
@@ -102,10 +102,6 @@ AMD_DISPLAY_FILES += $(AMD_DAL_RESOURCE_DCN21)
 
 ###############################################################################
 
-###############################################################################
-
-###############################################################################
-
 RESOURCE_DCN30 = dcn30_resource.o
 
 AMD_DAL_RESOURCE_DCN30 = $(addprefix $(AMDDALPATH)/dc/resource/dcn30/,$(RESOURCE_DCN30))
@@ -202,6 +198,4 @@ AMD_DISPLAY_FILES += $(AMD_DAL_RESOURCE_DCN351)
 
 ###############################################################################
 
-###############################################################################
-
 endif