clk: qcom: clk-cbf-8996: use HUAYRA_APSS register map for cbf_pll

The register map used for 'cbf_pll' is the same as the one defined for
the CLK_ALPHA_PLL_TYPE_HUAYRA_APSS indice in the 'clk_alpha_pll_regs'
array.

Drop the local register map and use the global one instead to reduce
code duplication.

No functional changes intended. Compile tested only.

Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
Link: https://lore.kernel.org/r/20240328-apss-ipq-pll-cleanup-v4-5-eddbf617f0c8@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/clk/qcom/clk-cbf-8996.c b/drivers/clk/qcom/clk-cbf-8996.c
index fe24b4abeab48085eac2dc587f997251fa9c9b71..76bf523431b858ec78d3c6a9089906c5515bd44e 100644 (file)
--- a/drivers/clk/qcom/clk-cbf-8996.c
+++ b/drivers/clk/qcom/clk-cbf-8996.c
@@ -41,17 +41,6 @@ enum {
 
 #define CBF_PLL_OFFSET 0xf000
 
-static const u8 cbf_pll_regs[PLL_OFF_MAX_REGS] = {
-       [PLL_OFF_L_VAL] = 0x08,
-       [PLL_OFF_ALPHA_VAL] = 0x10,
-       [PLL_OFF_USER_CTL] = 0x18,
-       [PLL_OFF_CONFIG_CTL] = 0x20,
-       [PLL_OFF_CONFIG_CTL_U] = 0x24,
-       [PLL_OFF_TEST_CTL] = 0x30,
-       [PLL_OFF_TEST_CTL_U] = 0x34,
-       [PLL_OFF_STATUS] = 0x28,
-};
-
 static struct alpha_pll_config cbfpll_config = {
        .l = 72,
        .config_ctl_val = 0x200d4828,
@@ -67,7 +56,7 @@ static struct alpha_pll_config cbfpll_config = {
 
 static struct clk_alpha_pll cbf_pll = {
        .offset = CBF_PLL_OFFSET,
-       .regs = cbf_pll_regs,
+       .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_HUAYRA_APSS],
        .flags = SUPPORTS_DYNAMIC_UPDATE | SUPPORTS_FSM_MODE,
        .clkr.hw.init = &(struct clk_init_data){
                .name = "cbf_pll",