return false;
 }
 
+static
+int intel_dp_pcon_set_tmds_mode(struct intel_dp *intel_dp)
+{
+       int ret;
+       u8 buf = 0;
+
+       /* Set PCON source control mode */
+       buf |= DP_PCON_ENABLE_SOURCE_CTL_MODE;
+
+       ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, buf);
+       if (ret < 0)
+               return ret;
+
+       /* Set HDMI LINK ENABLE */
+       buf |= DP_PCON_ENABLE_HDMI_LINK;
+       ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, buf);
+       if (ret < 0)
+               return ret;
+
+       return 0;
+}
+
 void intel_dp_check_frl_training(struct intel_dp *intel_dp)
 {
        struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
                int ret, mode;
 
                drm_dbg(&dev_priv->drm, "Couldn't set FRL mode, continuing with TMDS mode\n");
-               ret = drm_dp_pcon_reset_frl_config(&intel_dp->aux);
+               ret = intel_dp_pcon_set_tmds_mode(intel_dp);
                mode = drm_dp_pcon_hdmi_link_mode(&intel_dp->aux, NULL);
 
                if (ret < 0 || mode != DP_PCON_HDMI_MODE_TMDS)