drm/i915: Eliminate HAS_HW_CONTEXTS

HAS_HW_CONTEXTS is misleading condition for GPU reset and CCID,
replace it with Gen specific (to be updated in next patches).

HAS_HW_CONTEXTS in i915_l3_write is bogus because each HAS_L3_DPF
match also has .has_hw_contexts = 1 set.

This leads to us being able to get rid of the property completely.

v2:
- Keep the checks at Gen6 for no functional change (Ville)

Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e68edf1305cc4926b70e5044ca406ffcf3ca1646..cfa568902aac442e5f604d592866c29c67b106fa 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -822,7 +822,6 @@ struct intel_csr {
        func(has_gmch_display); \
        func(has_guc); \
        func(has_hotplug); \
-       func(has_hw_contexts); \
        func(has_l3_dpf); \
        func(has_llc); \
        func(has_logical_ring_contexts); \
@@ -2866,7 +2865,6 @@ intel_info(const struct drm_i915_private *dev_priv)
 
 #define HWS_NEEDS_PHYSICAL(dev_priv)   ((dev_priv)->info.hws_needs_physical)
 
-#define HAS_HW_CONTEXTS(dev_priv)          ((dev_priv)->info.has_hw_contexts)
 #define HAS_LOGICAL_RING_CONTEXTS(dev_priv) \
                ((dev_priv)->info.has_logical_ring_contexts)
 #define USES_PPGTT(dev_priv)           (i915.enable_ppgtt)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 33fb11cc5acc22140f1155f14f7e524ed7707127..ea34a321588dd4a2e6d3272cc36ff3d38a8ff087 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4488,7 +4488,7 @@ void i915_gem_sanitize(struct drm_i915_private *i915)
         * of the reset, so we only reset recent machines with logical
         * context support (that must be reset to remove any stray contexts).
         */
-       if (HAS_HW_CONTEXTS(i915)) {
+       if (INTEL_GEN(i915) >= 6) {
                int reset = intel_gpu_reset(i915, ALL_ENGINES);
                WARN_ON(reset && reset != -ENODEV);
        }

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 4b247b050dcd9e019e3ea8c4e561ef11ed6d4a79..fbdd06c43c61f65e128f31eb12f988afe399a7b2 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1598,6 +1598,9 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
                error->done_reg = I915_READ(DONE_REG);
        }
 
+       if (INTEL_GEN(dev_priv) >= 6)
+               error->ccid = I915_READ(CCID);
+
        /* 3: Feature specific registers */
        if (IS_GEN6(dev_priv) || IS_GEN7(dev_priv)) {
                error->gam_ecochk = I915_READ(GAM_ECOCHK);
@@ -1605,9 +1608,6 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
        }
 
        /* 4: Everything else */
-       if (HAS_HW_CONTEXTS(dev_priv))
-               error->ccid = I915_READ(CCID);
-
        if (INTEL_GEN(dev_priv) >= 8) {
                error->ier = I915_READ(GEN8_DE_MISC_IER);
                for (i = 0; i < 4; i++)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f87b0c4e564d8b85de91e93f7a8d9a6e6f219b61..f80db2ccd92fa040e97e8478ed2ec2097afd0b92 100644 (file)
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -220,7 +220,6 @@ static const struct intel_device_info intel_ironlake_m_info = {
        .has_rc6 = 1, \
        .has_rc6p = 1, \
        .has_gmbus_irq = 1, \
-       .has_hw_contexts = 1, \
        .has_aliasing_ppgtt = 1, \
        GEN_DEFAULT_PIPEOFFSETS, \
        CURSOR_OFFSETS
@@ -245,7 +244,6 @@ static const struct intel_device_info intel_sandybridge_m_info = {
        .has_rc6 = 1, \
        .has_rc6p = 1, \
        .has_gmbus_irq = 1, \
-       .has_hw_contexts = 1, \
        .has_aliasing_ppgtt = 1, \
        .has_full_ppgtt = 1, \
        GEN_DEFAULT_PIPEOFFSETS, \
@@ -280,7 +278,6 @@ static const struct intel_device_info intel_valleyview_info = {
        .has_runtime_pm = 1,
        .has_rc6 = 1,
        .has_gmbus_irq = 1,
-       .has_hw_contexts = 1,
        .has_gmch_display = 1,
        .has_hotplug = 1,
        .has_aliasing_ppgtt = 1,
@@ -340,7 +337,6 @@ static const struct intel_device_info intel_cherryview_info = {
        .has_resource_streamer = 1,
        .has_rc6 = 1,
        .has_gmbus_irq = 1,
-       .has_hw_contexts = 1,
        .has_logical_ring_contexts = 1,
        .has_gmch_display = 1,
        .has_aliasing_ppgtt = 1,
@@ -387,7 +383,6 @@ static const struct intel_device_info intel_skylake_gt3_info = {
        .has_rc6 = 1, \
        .has_dp_mst = 1, \
        .has_gmbus_irq = 1, \
-       .has_hw_contexts = 1, \
        .has_logical_ring_contexts = 1, \
        .has_guc = 1, \
        .has_decoupled_mmio = 1, \

diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index f3fdfda5e5588d8a040eebb570f32bd044cb9c77..a6ad1c279dc1ec97a5ce3111b3362a840104ae53 100644 (file)
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -185,9 +185,6 @@ i915_l3_write(struct file *filp, struct kobject *kobj,
        int slice = (int)(uintptr_t)attr->private;
        int ret;
 
-       if (!HAS_HW_CONTEXTS(dev_priv))
-               return -ENXIO;
-
        ret = l3_access_valid(dev_priv, offset);
        if (ret)
                return ret;