]> www.infradead.org Git - users/hch/misc.git/commitdiff
KVM: arm64: PMU: Set raw values from user to PM{C,I}NTEN{SET,CLR}, PMOVS{SET,CLR}
authorAkihiko Odaki <akihiko.odaki@daynix.com>
Sat, 15 Mar 2025 09:12:10 +0000 (18:12 +0900)
committerOliver Upton <oliver.upton@linux.dev>
Mon, 17 Mar 2025 17:42:22 +0000 (10:42 -0700)
Commit a45f41d754e0 ("KVM: arm64: Add {get,set}_user for
PM{C,I}NTEN{SET,CLR}, PMOVS{SET,CLR}") changed KVM_SET_ONE_REG to update
the mentioned registers in a way matching with the behavior of guest
register writes. This is a breaking change of a UAPI though the new
semantics looks cleaner and VMMs are not prepared for this.

Firecracker, QEMU, and crosvm perform migration by listing registers
with KVM_GET_REG_LIST, getting their values with KVM_GET_ONE_REG and
setting them with KVM_SET_ONE_REG. This algorithm assumes
KVM_SET_ONE_REG restores the values retrieved with KVM_GET_ONE_REG
without any alteration. However, bit operations added by the earlier
commit do not preserve the values retried with KVM_GET_ONE_REG and
potentially break migration.

Remove the bit operations that alter the values retrieved with
KVM_GET_ONE_REG.

Cc: stable@vger.kernel.org
Fixes: a45f41d754e0 ("KVM: arm64: Add {get,set}_user for PM{C,I}NTEN{SET,CLR}, PMOVS{SET,CLR}")
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20250315-pmc-v5-1-ecee87dab216@daynix.com
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
arch/arm64/kvm/sys_regs.c

index 82430c1e1dd02b1ac24fd2ddcd05a91272997fdb..ffee72fd1273efe96ab4ee658716b2677715efeb 100644 (file)
@@ -1051,26 +1051,9 @@ static bool access_pmu_evtyper(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
 
 static int set_pmreg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r, u64 val)
 {
-       bool set;
-
-       val &= kvm_pmu_accessible_counter_mask(vcpu);
-
-       switch (r->reg) {
-       case PMOVSSET_EL0:
-               /* CRm[1] being set indicates a SET register, and CLR otherwise */
-               set = r->CRm & 2;
-               break;
-       default:
-               /* Op2[0] being set indicates a SET register, and CLR otherwise */
-               set = r->Op2 & 1;
-               break;
-       }
-
-       if (set)
-               __vcpu_sys_reg(vcpu, r->reg) |= val;
-       else
-               __vcpu_sys_reg(vcpu, r->reg) &= ~val;
+       u64 mask = kvm_pmu_accessible_counter_mask(vcpu);
 
+       __vcpu_sys_reg(vcpu, r->reg) = val & mask;
        return 0;
 }