drm/xe/vf: Don't change hwe IRQ masks if using memory IRQs

We currently do not support changing the engine interrupt enable
mask on the per-engine basis when using memory based interrupts.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240619214557.905-5-michal.wajdeczko@intel.com

diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
index 8ee3c300c5e4b3dd96eed74a9b0c6b5cd7761630..ab3d5b7a1e8c78a78e4e8693a964a646d65672ee 100644 (file)
--- a/drivers/gpu/drm/xe/xe_irq.c
+++ b/drivers/gpu/drm/xe/xe_irq.c
@@ -134,6 +134,9 @@ void xe_irq_enable_hwe(struct xe_gt *gt)
        u32 gsc_mask = 0;
        u32 heci_mask = 0;
 
+       if (IS_SRIOV_VF(xe) && xe_device_has_memirq(xe))
+               return;
+
        if (xe_device_uc_enabled(xe)) {
                irqs = GT_RENDER_USER_INTERRUPT |
                        GT_RENDER_PIPECTL_NOTIFY_INTERRUPT;