ASoC: sof: amd: fix for firmware reload failure in Vangogh platform

Setting ACP ACLK as clock source when ACP enters D0 state causing
firmware load failure, as per design clock source should be internal
clock.

Remove acp_clkmux_sel field so that ACP will use internal clock
source when ACP enters into D0 state.

Fixes: d0dab6b76a9f ("ASoC: SOF: amd: Add sof support for vangogh platform")
Signed-off-by: Venkata Prasad Potturu <venkataprasad.potturu@amd.com>
Link: https://patch.msgid.link/20240718062004.581685-1-venkataprasad.potturu@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/sof/amd/pci-vangogh.c b/sound/soc/sof/amd/pci-vangogh.c
index 16eb2994fbab905b8c1f4994f078be4f013611da..eba5808401003be4446123644e430219dc7f1ecd 100644 (file)
--- a/sound/soc/sof/amd/pci-vangogh.c
+++ b/sound/soc/sof/amd/pci-vangogh.c
@@ -34,7 +34,6 @@ static const struct sof_amd_acp_desc vangogh_chip_info = {
        .dsp_intr_base  = ACP5X_DSP_SW_INTR_BASE,
        .sram_pte_offset = ACP5X_SRAM_PTE_OFFSET,
        .hw_semaphore_offset = ACP5X_AXI2DAGB_SEM_0,
-       .acp_clkmux_sel = ACP5X_CLKMUX_SEL,
        .probe_reg_offset = ACP5X_FUTURE_REG_ACLK_0,
 };