struct work_struct      work;
        u16                     cap_pos;
        bool                    rp_extensions;
-       u32                     rp_pio_status;
        u8                      rp_log_size;
 };
 
 
        if (dpc->rp_extensions && dpc_wait_rp_inactive(dpc))
                return PCI_ERS_RESULT_DISCONNECT;
-       if (dpc->rp_extensions && dpc->rp_pio_status) {
-               pci_write_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_STATUS,
-                                      dpc->rp_pio_status);
-               dpc->rp_pio_status = 0;
-       }
 
        pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS,
                              PCI_EXP_DPC_STATUS_TRIGGER);
        dev_err(dev, "rp_pio_status: %#010x, rp_pio_mask: %#010x\n",
                status, mask);
 
-       dpc->rp_pio_status = status;
-
        pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_SEVERITY, &sev);
        pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_SYSERROR, &syserr);
        pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_EXCEPTION, &exc);
        pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &dpc_status);
        first_error = (dpc_status & 0x1f00) >> 8;
 
-       status &= ~mask;
        for (i = 0; i < ARRAY_SIZE(rp_pio_error_string); i++) {
-               if (status & (1 << i))
+               if ((status & ~mask) & (1 << i))
                        dev_err(dev, "[%2d] %s%s\n", i, rp_pio_error_string[i],
                                first_error == i ? " (First)" : "");
        }
 
        if (dpc->rp_log_size < 4)
-               return;
+               goto clear_status;
        pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_HEADER_LOG,
                              &dw0);
        pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_HEADER_LOG + 4,
                dw0, dw1, dw2, dw3);
 
        if (dpc->rp_log_size < 5)
-               return;
+               goto clear_status;
        pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_IMPSPEC_LOG, &log);
        dev_err(dev, "RP PIO ImpSpec Log %#010x\n", log);
 
                        cap + PCI_EXP_DPC_RP_PIO_TLPPREFIX_LOG, &prefix);
                dev_err(dev, "TLP Prefix Header: dw%d, %#010x\n", i, prefix);
        }
+ clear_status:
+       pci_write_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_STATUS, status);
 }
 
 static void dpc_work(struct work_struct *work)