drm/amd/display: Add events log to trace OPTC lock and unlock

As an attempt to offer more DCN debug tools for cases where the OPTC can
hang, this commit introduces a trace event responsible for showing OPTC
status when it requests lock and unlock.

Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Reviewed-by: Aurabindo Pillai <Aurabindo.Pillai@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h
index d3bc9dc217717745efe964cdde9088bef5e35beb..0f580ea37576dc16d2f27be4e601030c5c8e2b52 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h
@@ -37,6 +37,7 @@
 #include <drm/drm_framebuffer.h>
 #include <drm/drm_encoder.h>
 #include <drm/drm_atomic.h>
+#include "dcn10/dcn10_optc.h"
 
 #include "dc/inc/core_types.h"
 
@@ -662,6 +663,69 @@ TRACE_EVENT(dcn_fpu,
            )
 );
 
+TRACE_EVENT(dcn_optc_lock_unlock_state,
+           TP_PROTO(const struct optc *optc_state, int instance, bool lock, const char *function, const int line),
+           TP_ARGS(optc_state, instance, lock, function, line),
+
+           TP_STRUCT__entry(
+                            __field(const char *, function)
+                            __field(int, instance)
+                            __field(bool, lock)
+                            __field(int, line)
+                            __field(int, opp_count)
+                            __field(int, max_h_total)
+                            __field(int, max_v_total)
+                            __field(int, min_h_blank)
+                            __field(int, min_h_sync_width)
+                            __field(int, min_v_sync_width)
+                            __field(int, min_v_blank)
+                            __field(int, min_v_blank_interlace)
+                            __field(int, vstartup_start)
+                            __field(int, vupdate_offset)
+                            __field(int, vupdate_width)
+                            __field(int, vready_offset)
+           ),
+           TP_fast_assign(
+                          __entry->function = function;
+                          __entry->instance = instance;
+                          __entry->lock = lock;
+                          __entry->line = line;
+                          __entry->opp_count = optc_state->opp_count;
+                          __entry->max_h_total = optc_state->max_h_total;
+                          __entry->max_v_total = optc_state->max_v_total;
+                          __entry->min_h_blank = optc_state->min_h_blank;
+                          __entry->min_h_sync_width = optc_state->min_h_sync_width;
+                          __entry->min_v_sync_width = optc_state->min_v_sync_width;
+                          __entry->min_v_blank = optc_state->min_v_blank;
+                          __entry->min_v_blank_interlace = optc_state->min_v_blank_interlace;
+                          __entry->vstartup_start = optc_state->vstartup_start;
+                          __entry->vupdate_offset = optc_state->vupdate_offset;
+                          __entry->vupdate_width = optc_state->vupdate_width;
+                          __entry->vready_offset = optc_state->vupdate_offset;
+           ),
+           TP_printk("%s: %s()+%d: optc_instance=%d opp_count=%d max_h_total=%d max_v_total=%d "
+                     "min_h_blank=%d min_h_sync_width=%d min_v_sync_width=%d min_v_blank=%d "
+                     "min_v_blank_interlace=%d vstartup_start=%d vupdate_offset=%d vupdate_width=%d "
+                     "vready_offset=%d",
+                     __entry->lock ? "Lock" : "Unlock",
+                     __entry->function,
+                     __entry->line,
+                     __entry->instance,
+                     __entry->opp_count,
+                     __entry->max_h_total,
+                     __entry->max_v_total,
+                     __entry->min_h_blank,
+                     __entry->min_h_sync_width,
+                     __entry->min_v_sync_width,
+                     __entry->min_v_blank,
+                     __entry->min_v_blank_interlace,
+                     __entry->vstartup_start,
+                     __entry->vupdate_offset,
+                     __entry->vupdate_width,
+                     __entry->vready_offset
+           )
+);
+
 #endif /* _AMDGPU_DM_TRACE_H_ */
 
 #undef TRACE_INCLUDE_PATH

diff --git a/drivers/gpu/drm/amd/display/dc/dc_trace.h b/drivers/gpu/drm/amd/display/dc/dc_trace.h
index c711797e5c9e02551dfed83b977b879d0b61fa2e..bbec308a3a5e2b2f3d504d24c07fa9f8b6315251 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_trace.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_trace.h
@@ -40,3 +40,5 @@
 
 #define TRACE_DCN_FPU(begin, function, line, ref_count) \
        trace_dcn_fpu(begin, function, line, ref_count)
+#define TRACE_OPTC_LOCK_UNLOCK_STATE(optc, inst, lock) \
+       trace_dcn_optc_lock_unlock_state(optc, inst, lock, __func__, __LINE__)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
index 33d7802187900866958df55bfd39f5627b83302f..c9e53dc49c92b3dcb899f4658c7d05558686b3f7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
@@ -27,6 +27,7 @@
 #include "reg_helper.h"
 #include "dcn10_optc.h"
 #include "dc.h"
+#include "dc_trace.h"
 
 #define REG(reg)\
        optc1->tg_regs->reg
@@ -657,6 +658,8 @@ void optc1_lock(struct timing_generator *optc)
                REG_WAIT(OTG_MASTER_UPDATE_LOCK,
                                UPDATE_LOCK_STATUS, 1,
                                1, 10);
+
+       TRACE_OPTC_LOCK_UNLOCK_STATE(optc1, optc->inst, true);
 }
 
 void optc1_unlock(struct timing_generator *optc)
@@ -665,6 +668,8 @@ void optc1_unlock(struct timing_generator *optc)
 
        REG_SET(OTG_MASTER_UPDATE_LOCK, 0,
                        OTG_MASTER_UPDATE_LOCK, 0);
+
+       TRACE_OPTC_LOCK_UNLOCK_STATE(optc1, optc->inst, false);
 }
 
 void optc1_get_position(struct timing_generator *optc,

diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
index 892d3c4d01a1ecd4742bd1ee61b0bd31e3cbdc0b..867d60151aebbea0f676975cc6f1e91c3e21abe4 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
@@ -30,6 +30,7 @@
 #include "dc_dmub_srv.h"
 
 #include "dml/dcn30/dcn30_fpu.h"
+#include "dc_trace.h"
 
 #define REG(reg)\
        optc1->tg_regs->reg
@@ -58,6 +59,8 @@ void optc3_triplebuffer_lock(struct timing_generator *optc)
                REG_WAIT(OTG_MASTER_UPDATE_LOCK,
                                UPDATE_LOCK_STATUS, 1,
                                1, 10);
+
+       TRACE_OPTC_LOCK_UNLOCK_STATE(optc1, optc->inst, true);
 }
 
 void optc3_lock_doublebuffer_enable(struct timing_generator *optc)
@@ -93,6 +96,8 @@ void optc3_lock_doublebuffer_enable(struct timing_generator *optc)
                MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_START_OFFSET, 0,
                MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_END_OFFSET, 100,
                OTG_MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_EN, 1);
+
+       TRACE_OPTC_LOCK_UNLOCK_STATE(optc1, optc->inst, true);
 }
 
 void optc3_lock_doublebuffer_disable(struct timing_generator *optc)
@@ -108,6 +113,8 @@ void optc3_lock_doublebuffer_disable(struct timing_generator *optc)
 
        REG_UPDATE(OTG_GLOBAL_CONTROL2, GLOBAL_UPDATE_LOCK_EN, 0);
        REG_UPDATE(OTG_GLOBAL_CONTROL0, MASTER_UPDATE_LOCK_DB_EN, 0);
+
+       TRACE_OPTC_LOCK_UNLOCK_STATE(optc1, optc->inst, true);
 }
 
 void optc3_lock(struct timing_generator *optc)
@@ -122,6 +129,8 @@ void optc3_lock(struct timing_generator *optc)
        REG_WAIT(OTG_MASTER_UPDATE_LOCK,
                        UPDATE_LOCK_STATUS, 1,
                        1, 10);
+
+       TRACE_OPTC_LOCK_UNLOCK_STATE(optc1, optc->inst, true);
 }
 
 void optc3_set_out_mux(struct timing_generator *optc, enum otg_out_mux_dest dest)