arm64/sme: Enable host kernel to access ZT0

The new register ZT0 introduced by SME2 comes with a new trap, disable it
for the host kernel so that we can implement support for it.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20221208-arm64-sme2-v4-7-f2fa0aef982f@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-stub.S
index 2ee18c860f2ab61de44444c7faa5ec77de7b3ca4..d31d1acb170d5e8c8d92f87c85208dd065c92528 100644 (file)
--- a/arch/arm64/kernel/hyp-stub.S
+++ b/arch/arm64/kernel/hyp-stub.S
@@ -132,6 +132,12 @@ SYM_CODE_START_LOCAL(__finalise_el2)
        orr     x0, x0, SMCR_ELx_FA64_MASK
 .Lskip_sme_fa64:
 
+       // ZT0 available?
+       __check_override id_aa64smfr0 ID_AA64SMFR0_EL1_SMEver_SHIFT 4 .Linit_sme_zt0 .Lskip_sme_zt0
+.Linit_sme_zt0:
+       orr     x0, x0, SMCR_ELx_EZT0_MASK
+.Lskip_sme_zt0:
+
        orr     x0, x0, #SMCR_ELx_LEN_MASK      // Enable full SME vector
        msr_s   SYS_SMCR_EL2, x0                // length for EL1.
 

diff --git a/arch/arm64/kernel/idreg-override.c b/arch/arm64/kernel/idreg-override.c
index 95133765ed29a0e4f9c68e1fecfb9d9332034454..d833d78a7f313563f86ab58c1d238e87492f0e88 100644 (file)
--- a/arch/arm64/kernel/idreg-override.c
+++ b/arch/arm64/kernel/idreg-override.c
@@ -131,6 +131,7 @@ static const struct ftr_set_desc smfr0 __initconst = {
        .name           = "id_aa64smfr0",
        .override       = &id_aa64smfr0_override,
        .fields         = {
+               FIELD("smever", ID_AA64SMFR0_EL1_SMEver_SHIFT, NULL),
                /* FA64 is a one bit field... :-/ */
                { "fa64", ID_AA64SMFR0_EL1_FA64_SHIFT, 1, },
                {}