ARM: EXYNOS: add GPC4 bank instance

Add GPC4 bank instance which is included in rev1 of EXYNOS5.

Signed-off-by: Sangsu Park <sangsu4u.park@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

diff --git a/arch/arm/mach-exynos/include/mach/gpio.h b/arch/arm/mach-exynos/include/mach/gpio.h
index d7498afe036ad4acd92c3c7a5a6c7b3f441a9d8b..eb24f1eb8e3b8398168add52aeb2faa963898387 100644 (file)
--- a/arch/arm/mach-exynos/include/mach/gpio.h
+++ b/arch/arm/mach-exynos/include/mach/gpio.h
@@ -153,10 +153,11 @@ enum exynos4_gpio_number {
 #define EXYNOS5_GPIO_B2_NR     (4)
 #define EXYNOS5_GPIO_B3_NR     (4)
 #define EXYNOS5_GPIO_C0_NR     (7)
-#define EXYNOS5_GPIO_C1_NR     (7)
+#define EXYNOS5_GPIO_C1_NR     (4)
 #define EXYNOS5_GPIO_C2_NR     (7)
 #define EXYNOS5_GPIO_C3_NR     (7)
-#define EXYNOS5_GPIO_D0_NR     (8)
+#define EXYNOS5_GPIO_C4_NR     (7)
+#define EXYNOS5_GPIO_D0_NR     (4)
 #define EXYNOS5_GPIO_D1_NR     (8)
 #define EXYNOS5_GPIO_Y0_NR     (6)
 #define EXYNOS5_GPIO_Y1_NR     (4)
@@ -199,7 +200,8 @@ enum exynos5_gpio_number {
        EXYNOS5_GPIO_C1_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C0),
        EXYNOS5_GPIO_C2_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C1),
        EXYNOS5_GPIO_C3_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C2),
-       EXYNOS5_GPIO_D0_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C3),
+       EXYNOS5_GPIO_C4_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C3),
+       EXYNOS5_GPIO_D0_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C4),
        EXYNOS5_GPIO_D1_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_D0),
        EXYNOS5_GPIO_Y0_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_D1),
        EXYNOS5_GPIO_Y1_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y0),
@@ -242,6 +244,7 @@ enum exynos5_gpio_number {
 #define EXYNOS5_GPC1(_nr)      (EXYNOS5_GPIO_C1_START + (_nr))
 #define EXYNOS5_GPC2(_nr)      (EXYNOS5_GPIO_C2_START + (_nr))
 #define EXYNOS5_GPC3(_nr)      (EXYNOS5_GPIO_C3_START + (_nr))
+#define EXYNOS5_GPC4(_nr)      (EXYNOS5_GPIO_C4_START + (_nr))
 #define EXYNOS5_GPD0(_nr)      (EXYNOS5_GPIO_D0_START + (_nr))
 #define EXYNOS5_GPD1(_nr)      (EXYNOS5_GPIO_D1_START + (_nr))
 #define EXYNOS5_GPY0(_nr)      (EXYNOS5_GPIO_Y0_START + (_nr))

diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index 86e75f561b6f04fcd5fdae0e300508b1fac28069..b1d3b68fcc9f63731d4a011c4401c06a440d7937 100644 (file)
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -435,7 +435,7 @@
 
 #define EXYNOS5_MAX_COMBINER_NR                32
 
-#define EXYNOS5_IRQ_GPIO1_NR_GROUPS    13
+#define EXYNOS5_IRQ_GPIO1_NR_GROUPS    14
 #define EXYNOS5_IRQ_GPIO2_NR_GROUPS    9
 #define EXYNOS5_IRQ_GPIO3_NR_GROUPS    5
 #define EXYNOS5_IRQ_GPIO4_NR_GROUPS    1

diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index e991d9171961ad198458b5a65e6fbaa5a51a92a0..f88bb9f919a89e0ff578af8f63869b30c619362e 100644 (file)
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -2452,6 +2452,12 @@ static struct samsung_gpio_chip exynos5_gpios_1[] = {
                        .ngpio  = EXYNOS5_GPIO_C3_NR,
                        .label  = "GPC3",
                },
+       }, {
+               .chip   = {
+                       .base   = EXYNOS5_GPC4(0),
+                       .ngpio  = EXYNOS5_GPIO_C4_NR,
+                       .label  = "GPC4",
+               },
        }, {
                .chip   = {
                        .base   = EXYNOS5_GPD0(0),
@@ -2878,8 +2884,11 @@ static __init int samsung_gpiolib_init(void)
                        goto err_ioremap1;
                }
 
+               /* need to set base address for gpc4 */
+               exynos5_gpios_1[11].base = gpio_base1 + 0x2E0;
+
                /* need to set base address for gpx */
-               chip = &exynos5_gpios_1[20];
+               chip = &exynos5_gpios_1[21];
                gpx_base = gpio_base1 + 0xC00;
                for (i = 0; i < 4; i++, chip++, gpx_base += 0x20)
                        chip->base = gpx_base;