]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
drm/i915: pass dev_priv explicitly to DSPARB
authorJani Nikula <jani.nikula@intel.com>
Tue, 4 Jun 2024 15:25:43 +0000 (18:25 +0300)
committerJani Nikula <jani.nikula@intel.com>
Fri, 7 Jun 2024 08:13:18 +0000 (11:13 +0300)
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPARB register macro.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/9e8dc8978ce3122a0e9c53778be547875a9ae6d8.1717514638.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/i9xx_wm.c
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/i915_suspend.c

index 628e7192ebc97e4d896081b0921a59971cbf94d2..fd14010b4cc3318615f1573287fd6e4cf9293988 100644 (file)
@@ -269,13 +269,15 @@ static void vlv_get_fifo_size(struct intel_crtc_state *crtc_state)
 
        switch (pipe) {
        case PIPE_A:
-               dsparb = intel_uncore_read(&dev_priv->uncore, DSPARB);
+               dsparb = intel_uncore_read(&dev_priv->uncore,
+                                          DSPARB(dev_priv));
                dsparb2 = intel_uncore_read(&dev_priv->uncore, DSPARB2);
                sprite0_start = VLV_FIFO_START(dsparb, dsparb2, 0, 0);
                sprite1_start = VLV_FIFO_START(dsparb, dsparb2, 8, 4);
                break;
        case PIPE_B:
-               dsparb = intel_uncore_read(&dev_priv->uncore, DSPARB);
+               dsparb = intel_uncore_read(&dev_priv->uncore,
+                                          DSPARB(dev_priv));
                dsparb2 = intel_uncore_read(&dev_priv->uncore, DSPARB2);
                sprite0_start = VLV_FIFO_START(dsparb, dsparb2, 16, 8);
                sprite1_start = VLV_FIFO_START(dsparb, dsparb2, 24, 12);
@@ -300,7 +302,7 @@ static void vlv_get_fifo_size(struct intel_crtc_state *crtc_state)
 static int i9xx_get_fifo_size(struct drm_i915_private *dev_priv,
                              enum i9xx_plane_id i9xx_plane)
 {
-       u32 dsparb = intel_uncore_read(&dev_priv->uncore, DSPARB);
+       u32 dsparb = intel_uncore_read(&dev_priv->uncore, DSPARB(dev_priv));
        int size;
 
        size = dsparb & 0x7f;
@@ -316,7 +318,7 @@ static int i9xx_get_fifo_size(struct drm_i915_private *dev_priv,
 static int i830_get_fifo_size(struct drm_i915_private *dev_priv,
                              enum i9xx_plane_id i9xx_plane)
 {
-       u32 dsparb = intel_uncore_read(&dev_priv->uncore, DSPARB);
+       u32 dsparb = intel_uncore_read(&dev_priv->uncore, DSPARB(dev_priv));
        int size;
 
        size = dsparb & 0x1ff;
@@ -333,7 +335,7 @@ static int i830_get_fifo_size(struct drm_i915_private *dev_priv,
 static int i845_get_fifo_size(struct drm_i915_private *dev_priv,
                              enum i9xx_plane_id i9xx_plane)
 {
-       u32 dsparb = intel_uncore_read(&dev_priv->uncore, DSPARB);
+       u32 dsparb = intel_uncore_read(&dev_priv->uncore, DSPARB(dev_priv));
        int size;
 
        size = dsparb & 0x7f;
@@ -1787,7 +1789,7 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
 
        switch (crtc->pipe) {
        case PIPE_A:
-               dsparb = intel_uncore_read_fw(uncore, DSPARB);
+               dsparb = intel_uncore_read_fw(uncore, DSPARB(dev_priv));
                dsparb2 = intel_uncore_read_fw(uncore, DSPARB2);
 
                dsparb &= ~(VLV_FIFO(SPRITEA, 0xff) |
@@ -1800,11 +1802,11 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
                dsparb2 |= (VLV_FIFO(SPRITEA_HI, sprite0_start >> 8) |
                           VLV_FIFO(SPRITEB_HI, sprite1_start >> 8));
 
-               intel_uncore_write_fw(uncore, DSPARB, dsparb);
+               intel_uncore_write_fw(uncore, DSPARB(dev_priv), dsparb);
                intel_uncore_write_fw(uncore, DSPARB2, dsparb2);
                break;
        case PIPE_B:
-               dsparb = intel_uncore_read_fw(uncore, DSPARB);
+               dsparb = intel_uncore_read_fw(uncore, DSPARB(dev_priv));
                dsparb2 = intel_uncore_read_fw(uncore, DSPARB2);
 
                dsparb &= ~(VLV_FIFO(SPRITEC, 0xff) |
@@ -1817,7 +1819,7 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
                dsparb2 |= (VLV_FIFO(SPRITEC_HI, sprite0_start >> 8) |
                           VLV_FIFO(SPRITED_HI, sprite1_start >> 8));
 
-               intel_uncore_write_fw(uncore, DSPARB, dsparb);
+               intel_uncore_write_fw(uncore, DSPARB(dev_priv), dsparb);
                intel_uncore_write_fw(uncore, DSPARB2, dsparb2);
                break;
        case PIPE_C:
@@ -1841,7 +1843,7 @@ static void vlv_atomic_update_fifo(struct intel_atomic_state *state,
                break;
        }
 
-       intel_uncore_posting_read_fw(uncore, DSPARB);
+       intel_uncore_posting_read_fw(uncore, DSPARB(dev_priv));
 
        spin_unlock(&uncore->lock);
 }
index 37796427511f147d7882cdf7bb5a1c9373b07468..e206725adb1555f00349998e0eb135de5fd57afd 100644 (file)
 #define   SPRITEA_INVALID_GTT_STATUS                   REG_BIT(1)
 #define   PLANEA_INVALID_GTT_STATUS                    REG_BIT(0)
 
-#define DSPARB                 _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x70030)
+#define DSPARB(dev_priv)                       _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x70030)
 #define   DSPARB_CSTART_MASK   (0x7f << 7)
 #define   DSPARB_CSTART_SHIFT  7
 #define   DSPARB_BSTART_MASK   (0x7f)
index 81def10eb58fc999f9ced2c2db4693369e2571d0..bc449613c84861e741e107d0011aebe15092d9f0 100644 (file)
@@ -92,7 +92,8 @@ void i915_save_display(struct drm_i915_private *dev_priv)
 
        /* Display arbitration control */
        if (GRAPHICS_VER(dev_priv) <= 4)
-               dev_priv->regfile.saveDSPARB = intel_de_read(dev_priv, DSPARB);
+               dev_priv->regfile.saveDSPARB = intel_de_read(dev_priv,
+                                                            DSPARB(dev_priv));
 
        if (GRAPHICS_VER(dev_priv) == 4)
                pci_read_config_word(pdev, GCDGMBUS,
@@ -116,7 +117,8 @@ void i915_restore_display(struct drm_i915_private *dev_priv)
 
        /* Display arbitration */
        if (GRAPHICS_VER(dev_priv) <= 4)
-               intel_de_write(dev_priv, DSPARB, dev_priv->regfile.saveDSPARB);
+               intel_de_write(dev_priv, DSPARB(dev_priv),
+                              dev_priv->regfile.saveDSPARB);
 
        intel_vga_redisable(dev_priv);