wl->ver_info.fw = le32_to_cpu(prpt->v4.wl_fw_info.fw_ver);
                        dm->wl_fw_cx_offload = !!le32_to_cpu(prpt->v4.wl_fw_info.cx_offload);
 
-                       for (i = RTW89_PHY_0; i < RTW89_PHY_MAX; i++)
+                       for (i = RTW89_PHY_0; i < RTW89_PHY_NUM; i++)
                                memcpy(&dm->gnt.band[i], &prpt->v4.gnt_val[i],
                                       sizeof(dm->gnt.band[i]));
 
                        wl->ver_info.fw = le32_to_cpu(prpt->v5.rpt_info.fw_ver);
                        dm->wl_fw_cx_offload = 0;
 
-                       for (i = RTW89_PHY_0; i < RTW89_PHY_MAX; i++)
+                       for (i = RTW89_PHY_0; i < RTW89_PHY_NUM; i++)
                                memcpy(&dm->gnt.band[i], &prpt->v5.gnt_val[i][0],
                                       sizeof(dm->gnt.band[i]));
 
                        wl->ver_info.fw = le32_to_cpu(prpt->v105.rpt_info.fw_ver);
                        dm->wl_fw_cx_offload = 0;
 
-                       for (i = RTW89_PHY_0; i < RTW89_PHY_MAX; i++)
+                       for (i = RTW89_PHY_0; i < RTW89_PHY_NUM; i++)
                                memcpy(&dm->gnt.band[i], &prpt->v105.gnt_val[i][0],
                                       sizeof(dm->gnt.band[i]));
 
                        wl->ver_info.fw_coex = le32_to_cpu(prpt->v7.rpt_info.cx_ver);
                        wl->ver_info.fw = le32_to_cpu(prpt->v7.rpt_info.fw_ver);
 
-                       for (i = RTW89_PHY_0; i < RTW89_PHY_MAX; i++)
+                       for (i = RTW89_PHY_0; i < RTW89_PHY_NUM; i++)
                                memcpy(&dm->gnt.band[i], &prpt->v7.gnt_val[i][0],
                                       sizeof(dm->gnt.band[i]));
 
                        wl->ver_info.fw_coex = le32_to_cpu(prpt->v8.rpt_info.cx_ver);
                        wl->ver_info.fw = le32_to_cpu(prpt->v8.rpt_info.fw_ver);
 
-                       for (i = RTW89_PHY_0; i < RTW89_PHY_MAX; i++)
+                       for (i = RTW89_PHY_0; i < RTW89_PHY_NUM; i++)
                                memcpy(&dm->gnt.band[i], &prpt->v8.gnt_val[i][0],
                                       sizeof(dm->gnt.band[i]));
 
        if (phy_map > BTC_PHY_ALL)
                return;
 
-       for (i = 0; i < RTW89_PHY_MAX; i++) {
+       for (i = 0; i < RTW89_PHY_NUM; i++) {
                if (!(phy_map & BIT(i)))
                        continue;
 
        if (phy_map > BTC_PHY_ALL)
                return;
 
-       for (i = 0; i < RTW89_PHY_MAX; i++) {
+       for (i = 0; i < RTW89_PHY_NUM; i++) {
                if (!(phy_map & BIT(i)))
                        continue;
 
 
        if (ver->fwlrole == 0) {
                link_mode = wl->role_info.link_mode;
-               for (i = 0; i < RTW89_PHY_MAX; i++) {
+               for (i = 0; i < RTW89_PHY_NUM; i++) {
                        if (wl->dbcc_info.real_band[i] == RTW89_BAND_2G)
                                dbcc_2g_phy = i;
                }
        case BTC_ANT_W2G:
                rtw89_chip_cfg_ctrl_path(rtwdev, BTC_CTRL_BY_WL);
                if (rtwdev->dbcc_en) {
-                       for (i = 0; i < RTW89_PHY_MAX; i++) {
+                       for (i = 0; i < RTW89_PHY_NUM; i++) {
                                b2g = (wl_dinfo->real_band[i] == RTW89_BAND_2G);
 
                                gnt_wl_ctrl = b2g ? BTC_GNT_HW : BTC_GNT_SW_HI;
 
        if (rtwdev->dbcc_en) {
                if (ver->fwlrole == 0) {
-                       wl_rinfo.dbcc_2g_phy = RTW89_PHY_MAX;
+                       wl_rinfo.dbcc_2g_phy = RTW89_PHY_NUM;
 
-                       for (i = 0; i < RTW89_PHY_MAX; i++) {
+                       for (i = 0; i < RTW89_PHY_NUM; i++) {
                                if (wl_dinfo->real_band[i] == RTW89_BAND_2G)
                                        wl_rinfo.dbcc_2g_phy = i;
                        }
                phy = wl_linfo[i].phy;
 
                /* check dbcc role */
-               if (rtwdev->dbcc_en && phy < RTW89_PHY_MAX) {
+               if (rtwdev->dbcc_en && phy < RTW89_PHY_NUM) {
                        wl_dinfo->role[phy] = wl_linfo[i].role;
                        wl_dinfo->op_band[phy] = wl_linfo[i].band;
                        _update_dbcc_band(rtwdev, phy);
 
                phy = wl_linfo[i].phy;
 
-               if (rtwdev->dbcc_en && phy < RTW89_PHY_MAX) {
+               if (rtwdev->dbcc_en && phy < RTW89_PHY_NUM) {
                        wl_dinfo->role[phy] = wl_linfo[i].role;
                        wl_dinfo->op_band[phy] = wl_linfo[i].band;
                        _update_dbcc_band(rtwdev, phy);
 
                phy = wl_linfo[i].phy;
 
-               if (rtwdev->dbcc_en && phy < RTW89_PHY_MAX) {
+               if (rtwdev->dbcc_en && phy < RTW89_PHY_NUM) {
                        wl_dinfo->role[phy] = wl_linfo[i].role;
                        wl_dinfo->op_band[phy] = wl_linfo[i].band;
                        _update_dbcc_band(rtwdev, phy);
        struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info;
        struct rtw89_btc_wl_link_info *wl_linfo = wl->link_info;
        struct rtw89_btc_wl_active_role_v7 *act_role = NULL;
-       u8 i, mode, cnt = 0, cnt_2g = 0, cnt_5g = 0, phy_now = RTW89_PHY_MAX, phy_dbcc;
+       u8 i, mode, cnt = 0, cnt_2g = 0, cnt_5g = 0, phy_now = RTW89_PHY_NUM, phy_dbcc;
        bool b2g = false, b5g = false, client_joined = false, client_inc_2g = false;
        u8 client_cnt_last[RTW89_BE_BTC_WL_MAX_ROLE_NUMBER] = {};
        u8 cid_role[RTW89_BE_BTC_WL_MAX_ROLE_NUMBER] = {};
        memset(wl_rinfo, 0, sizeof(*wl_rinfo));
 
        for (i = 0; i < RTW89_PORT_NUM; i++) {
-               if (!wl_linfo[i].active || wl_linfo[i].phy >= RTW89_PHY_MAX)
+               if (!wl_linfo[i].active || wl_linfo[i].phy >= RTW89_PHY_NUM)
                        continue;
 
                act_role = &wl_rinfo->active_role[i];
                mode = _chk_dbcc(rtwdev, cid_ch, cid_phy, cid_role, &dbcc_2g_phy);
 
                /* correct 2G-located PHY band for gnt ctrl */
-               if (dbcc_2g_phy < RTW89_PHY_MAX)
+               if (dbcc_2g_phy < RTW89_PHY_NUM)
                        wl_dinfo->op_band[dbcc_2g_phy] = RTW89_BAND_2G;
        } else if (b2g && b5g && cnt == 2) {
                mode = BTC_WLINK_25G_MCC;
                    "[BTC], %s(): phy_idx=%d, band=%d\n",
                    __func__, phy_idx, band);
 
-       if (phy_idx >= RTW89_PHY_MAX)
+       if (phy_idx >= RTW89_PHY_NUM)
                return;
 
        btc->dm.cnt_notify[BTC_NCNT_SCAN_START]++;
                    "[BTC], %s(): phy_idx=%d, band=%d\n",
                    __func__, phy_idx, band);
 
-       if (phy_idx >= RTW89_PHY_MAX)
+       if (phy_idx >= RTW89_PHY_NUM)
                return;
 
        btc->dm.cnt_notify[BTC_NCNT_SWITCH_BAND]++;
 
 enum rtw89_phy_idx {
        RTW89_PHY_0 = 0,
        RTW89_PHY_1 = 1,
-       RTW89_PHY_MAX
+       RTW89_PHY_NUM,
 };
 
 #define __RTW89_MLD_MAX_LINK_NUM 2
 };
 
 struct rtw89_btc_wl_scan_info {
-       u8 band[RTW89_PHY_MAX];
+       u8 band[RTW89_PHY_NUM];
        u8 phy_map;
        u8 rsvd;
 };
 
 struct rtw89_btc_wl_dbcc_info {
-       u8 op_band[RTW89_PHY_MAX]; /* op band in each phy */
-       u8 scan_band[RTW89_PHY_MAX]; /* scan band in  each phy */
-       u8 real_band[RTW89_PHY_MAX];
-       u8 role[RTW89_PHY_MAX]; /* role in each phy */
+       u8 op_band[RTW89_PHY_NUM]; /* op band in each phy */
+       u8 scan_band[RTW89_PHY_NUM]; /* scan band in  each phy */
+       u8 real_band[RTW89_PHY_NUM];
+       u8 role[RTW89_PHY_NUM]; /* role in each phy */
 };
 
 struct rtw89_btc_wl_active_role {
        u8 cn_report;
        u8 coex_mode;
        u8 pta_req_mac;
-       u8 bt_polut_type[RTW89_PHY_MAX]; /* BT polluted WL-Tx type for phy0/1  */
+       u8 bt_polut_type[RTW89_PHY_NUM]; /* BT polluted WL-Tx type for phy0/1  */
 
        bool is_5g_hi_channel;
        bool pta_reg_mac_chg;
        struct rtw89_btc_fbtc_rpt_ctrl_wl_fw_info wl_fw_info;
        struct rtw89_btc_fbtc_rpt_ctrl_bt_mailbox bt_mbx_info;
        __le32 bt_cnt[BTC_BCNT_STA_MAX];
-       struct rtw89_mac_ax_gnt gnt_val[RTW89_PHY_MAX];
+       struct rtw89_mac_ax_gnt gnt_val[RTW89_PHY_NUM];
 } __packed;
 
 struct rtw89_btc_fbtc_rpt_ctrl_v5 {
        u8 rsvd;
        __le16 rsvd1;
 
-       u8 gnt_val[RTW89_PHY_MAX][4];
+       u8 gnt_val[RTW89_PHY_NUM][4];
        __le16 bt_cnt[BTC_BCNT_STA_MAX];
 
        struct rtw89_btc_fbtc_rpt_ctrl_info_v5 rpt_info;
        u8 rsvd;
        __le16 rsvd1;
 
-       u8 gnt_val[RTW89_PHY_MAX][4];
+       u8 gnt_val[RTW89_PHY_NUM][4];
        __le16 bt_cnt[BTC_BCNT_STA_MAX_V105];
 
        struct rtw89_btc_fbtc_rpt_ctrl_info_v5 rpt_info;
        u8 rsvd1;
        u8 rsvd2;
 
-       u8 gnt_val[RTW89_PHY_MAX][4];
+       u8 gnt_val[RTW89_PHY_NUM][4];
        __le16 bt_cnt[BTC_BCNT_STA_MAX_V105];
 
        struct rtw89_btc_fbtc_rpt_ctrl_info_v8 rpt_info;
        u8 rpt_len_max_l; /* BTC_RPT_MAX bit0~7 */
        u8 rpt_len_max_h; /* BTC_RPT_MAX bit8~15 */
 
-       u8 gnt_val[RTW89_PHY_MAX][4];
+       u8 gnt_val[RTW89_PHY_NUM][4];
        __le16 bt_cnt[BTC_BCNT_STA_MAX_V105];
 
        struct rtw89_btc_fbtc_rpt_ctrl_info_v8 rpt_info;
        struct rtw89_chanctx chanctx[NUM_OF_RTW89_CHANCTX];
        struct cfg80211_chan_def roc_chandef;
 
-       bool entity_active[RTW89_PHY_MAX];
+       bool entity_active[RTW89_PHY_NUM];
        bool entity_pause;
        enum rtw89_entity_mode entity_mode;
        struct rtw89_entity_mgnt entity_mgnt;
 struct rtw89_dpk_info {
        bool is_dpk_enable;
        bool is_dpk_reload_en;
-       u8 dpk_gs[RTW89_PHY_MAX];
+       u8 dpk_gs[RTW89_PHY_NUM];
        u16 dc_i[RTW89_DPK_RF_PATH][RTW89_DPK_BKUP_NUM];
        u16 dc_q[RTW89_DPK_RF_PATH][RTW89_DPK_BKUP_NUM];
        u8 corr_val[RTW89_DPK_RF_PATH][RTW89_DPK_BKUP_NUM];
 };
 
 struct rtw89_ppdu_sts_info {
-       struct sk_buff_head rx_queue[RTW89_PHY_MAX];
-       u8 curr_rx_ppdu_cnt[RTW89_PHY_MAX];
+       struct sk_buff_head rx_queue[RTW89_PHY_NUM];
+       u8 curr_rx_ppdu_cnt[RTW89_PHY_NUM];
 };
 
 struct rtw89_early_h2c {
        bool offset_valid;
        bool comp_valid;
        s8 offset[RF_PATH_MAX][RTW89_GAIN_OFFSET_NR]; /* S(8, 0) */
-       s8 offset_base[RTW89_PHY_MAX]; /* S(8, 4) */
-       s8 rssi_base[RTW89_PHY_MAX]; /* S(8, 4) */
+       s8 offset_base[RTW89_PHY_NUM]; /* S(8, 4) */
+       s8 rssi_base[RTW89_PHY_NUM]; /* S(8, 4) */
        s8 comp[RF_PATH_MAX][RTW89_SUBBAND_NR]; /* S(8, 0) */
 };