]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
drm/i915/dp: Don't switch to idle pattern before disable on pre-hsw
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 10 Jul 2025 20:17:13 +0000 (23:17 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 17 Jul 2025 16:41:24 +0000 (19:41 +0300)
For some reason we are switching over to the idle pattern before
disabling the DP port on pre-hsw. AFAICS this has never been part
of the documented sequence (and on hsw+ the spec explicitly says
not to do this). Get rid of it.

The code goes all the way back to commit 5eb08b69f510 ("drm/i915: enable
DisplayPort support on IGDNG"), and it was accompanied by a 17ms delay
which got changed to vbl wait in commit ab527efc2fea ("drm/i915: use
wait_for_vblank instead of msleep(17)"), and was later completely removed
in  commit 93c9c19b3d25 ("drm/i915: remove unexplained vblank wait in
the DP off code").

Smoke tested on g4x/snb/chv.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250710201718.25310-3-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
drivers/gpu/drm/i915/display/g4x_dp.c

index 87f6b9602b16a0833aa4e16fb44e3312fa281883..b54edf0d1c235b9680997a0699d45045aad6bf12 100644 (file)
@@ -424,17 +424,6 @@ intel_dp_link_down(struct intel_encoder *encoder,
 
        drm_dbg_kms(display->drm, "\n");
 
-       if ((display->platform.ivybridge && port == PORT_A) ||
-           (HAS_PCH_CPT(display) && port != PORT_A)) {
-               intel_dp->DP &= ~DP_LINK_TRAIN_MASK_CPT;
-               intel_dp->DP |= DP_LINK_TRAIN_PAT_IDLE_CPT;
-       } else {
-               intel_dp->DP &= ~DP_LINK_TRAIN_MASK;
-               intel_dp->DP |= DP_LINK_TRAIN_PAT_IDLE;
-       }
-       intel_de_write(display, intel_dp->output_reg, intel_dp->DP);
-       intel_de_posting_read(display, intel_dp->output_reg);
-
        intel_dp->DP &= ~DP_PORT_EN;
        intel_de_write(display, intel_dp->output_reg, intel_dp->DP);
        intel_de_posting_read(display, intel_dp->output_reg);