drm/xe/vf: Don't touch GuC irq registers if using memory irqs
authorMichal Wajdeczko <michal.wajdeczko@intel.com>
Mon, 17 Jun 2024 15:47:36 +0000 (17:47 +0200)
committerMichal Wajdeczko <michal.wajdeczko@intel.com>
Tue, 18 Jun 2024 10:33:06 +0000 (12:33 +0200)
On platforms where VFs are using memory based interrupts, we
missed invalid access to no longer existing interrupt registers,
as we keep them marked with XE_REG_OPTION_VF. To fix that just
either setup memirq vectors in GuC or enable legacy interrupts.

Fixes: aef4eb7c7dec ("drm/xe/vf: Setup memory based interrupts in GuC")
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240617154736.685-1-michal.wajdeczko@intel.com
drivers/gpu/drm/xe/xe_guc.c

index 0e1a5674ef1309cdd71480f93712bf23c66f130e..7ecb509c87d7fb0514890d532253c052179f68e3 100644 (file)
@@ -854,8 +854,6 @@ int xe_guc_enable_communication(struct xe_guc *guc)
        struct xe_device *xe = guc_to_xe(guc);
        int err;
 
-       guc_enable_irq(guc);
-
        if (IS_SRIOV_VF(xe) && xe_device_has_memirq(xe)) {
                struct xe_gt *gt = guc_to_gt(guc);
                struct xe_tile *tile = gt_to_tile(gt);
@@ -863,6 +861,8 @@ int xe_guc_enable_communication(struct xe_guc *guc)
                err = xe_memirq_init_guc(&tile->sriov.vf.memirq, guc);
                if (err)
                        return err;
+       } else {
+               guc_enable_irq(guc);
        }
 
        xe_mmio_rmw32(guc_to_gt(guc), PMINTRMSK,