* this function, memory access functions may still return -EFAULT.
  */
 
-#define __access_mask get_fs().seg
-
-#define __access_ok(addr, size, mask)                                  \
-({                                                                     \
-       unsigned long __addr = (unsigned long) (addr);                  \
-       unsigned long __size = size;                                    \
-       unsigned long __mask = mask;                                    \
-       unsigned long __ok;                                             \
-                                                                       \
-       __chk_user_ptr(addr);                                           \
-       __ok = (signed long)(__mask & (__addr | (__addr + __size) |     \
-               __ua_size(__size)));                                    \
-       __ok == 0;                                                      \
-})
+static inline int __access_ok(const void __user *p, unsigned long size)
+{
+       unsigned long addr = (unsigned long)p;
+       return (get_fs().seg & (addr | (addr + size) | __ua_size(size))) == 0;
+}
 
 #define access_ok(type, addr, size)                                    \
-       likely(__access_ok((addr), (size), __access_mask))
+       likely(__access_ok((addr), (size)))
 
 /*
  * put_user: - Write a simple value into user space.
 
        case lwl_op:
                rt = regs->regs[MIPSInst_RT(inst)];
                vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
-               if (!access_ok(VERIFY_READ, vaddr, 4)) {
+               if (!access_ok(VERIFY_READ, (void __user *)vaddr, 4)) {
                        current->thread.cp0_baduaddr = vaddr;
                        err = SIGSEGV;
                        break;
        case lwr_op:
                rt = regs->regs[MIPSInst_RT(inst)];
                vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
-               if (!access_ok(VERIFY_READ, vaddr, 4)) {
+               if (!access_ok(VERIFY_READ, (void __user *)vaddr, 4)) {
                        current->thread.cp0_baduaddr = vaddr;
                        err = SIGSEGV;
                        break;
        case swl_op:
                rt = regs->regs[MIPSInst_RT(inst)];
                vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
-               if (!access_ok(VERIFY_WRITE, vaddr, 4)) {
+               if (!access_ok(VERIFY_WRITE, (void __user *)vaddr, 4)) {
                        current->thread.cp0_baduaddr = vaddr;
                        err = SIGSEGV;
                        break;
        case swr_op:
                rt = regs->regs[MIPSInst_RT(inst)];
                vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
-               if (!access_ok(VERIFY_WRITE, vaddr, 4)) {
+               if (!access_ok(VERIFY_WRITE, (void __user *)vaddr, 4)) {
                        current->thread.cp0_baduaddr = vaddr;
                        err = SIGSEGV;
                        break;
 
                rt = regs->regs[MIPSInst_RT(inst)];
                vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
-               if (!access_ok(VERIFY_READ, vaddr, 8)) {
+               if (!access_ok(VERIFY_READ, (void __user *)vaddr, 8)) {
                        current->thread.cp0_baduaddr = vaddr;
                        err = SIGSEGV;
                        break;
 
                rt = regs->regs[MIPSInst_RT(inst)];
                vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
-               if (!access_ok(VERIFY_READ, vaddr, 8)) {
+               if (!access_ok(VERIFY_READ, (void __user *)vaddr, 8)) {
                        current->thread.cp0_baduaddr = vaddr;
                        err = SIGSEGV;
                        break;
 
                rt = regs->regs[MIPSInst_RT(inst)];
                vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
-               if (!access_ok(VERIFY_WRITE, vaddr, 8)) {
+               if (!access_ok(VERIFY_WRITE, (void __user *)vaddr, 8)) {
                        current->thread.cp0_baduaddr = vaddr;
                        err = SIGSEGV;
                        break;
 
                rt = regs->regs[MIPSInst_RT(inst)];
                vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
-               if (!access_ok(VERIFY_WRITE, vaddr, 8)) {
+               if (!access_ok(VERIFY_WRITE, (void __user *)vaddr, 8)) {
                        current->thread.cp0_baduaddr = vaddr;
                        err = SIGSEGV;
                        break;
                        err = SIGBUS;
                        break;
                }
-               if (!access_ok(VERIFY_READ, vaddr, 4)) {
+               if (!access_ok(VERIFY_READ, (void __user *)vaddr, 4)) {
                        current->thread.cp0_baduaddr = vaddr;
                        err = SIGBUS;
                        break;
                        err = SIGBUS;
                        break;
                }
-               if (!access_ok(VERIFY_WRITE, vaddr, 4)) {
+               if (!access_ok(VERIFY_WRITE, (void __user *)vaddr, 4)) {
                        current->thread.cp0_baduaddr = vaddr;
                        err = SIGBUS;
                        break;
                        err = SIGBUS;
                        break;
                }
-               if (!access_ok(VERIFY_READ, vaddr, 8)) {
+               if (!access_ok(VERIFY_READ, (void __user *)vaddr, 8)) {
                        current->thread.cp0_baduaddr = vaddr;
                        err = SIGBUS;
                        break;
                        err = SIGBUS;
                        break;
                }
-               if (!access_ok(VERIFY_WRITE, vaddr, 8)) {
+               if (!access_ok(VERIFY_WRITE, (void __user *)vaddr, 8)) {
                        current->thread.cp0_baduaddr = vaddr;
                        err = SIGBUS;
                        break;