drm/amdgpu: Added ASIC specific checks in gfxhub V1.1 get XGMI info

Added max hive/node info checks per supported ASIC

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c
index 5e9ab8eb214a023c2147bbb86dcaa9240e280942..c0ab71df0d90475ead34768ea4b2db0e9a64c7ed 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c
@@ -33,16 +33,31 @@ int gfxhub_v1_1_get_xgmi_info(struct amdgpu_device *adev)
        u32 xgmi_lfb_cntl = RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_CNTL);
        u32 max_region =
                REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, PF_MAX_REGION);
+       u32 max_num_physical_nodes   = 0;
+       u32 max_physical_node_id     = 0;
+
+       switch (adev->asic_type) {
+       case CHIP_VEGA20:
+               max_num_physical_nodes   = 4;
+               max_physical_node_id     = 3;
+               break;
+       case CHIP_ARCTURUS:
+               max_num_physical_nodes   = 8;
+               max_physical_node_id     = 7;
+               break;
+       default:
+               return -EINVAL;
+       }
 
        /* PF_MAX_REGION=0 means xgmi is disabled */
        if (max_region) {
                adev->gmc.xgmi.num_physical_nodes = max_region + 1;
-               if (adev->gmc.xgmi.num_physical_nodes > 4)
+               if (adev->gmc.xgmi.num_physical_nodes > max_num_physical_nodes)
                        return -EINVAL;
 
                adev->gmc.xgmi.physical_node_id =
                        REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, PF_LFB_REGION);
-               if (adev->gmc.xgmi.physical_node_id > 3)
+               if (adev->gmc.xgmi.physical_node_id > max_physical_node_id)
                        return -EINVAL;
                adev->gmc.xgmi.node_segment_size = REG_GET_FIELD(
                        RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_SIZE),