spi: spi-mem: Create macros for DTR operation

We do have macros for defining command, address, dummy and data
cycles. We also have a .dtr flag that implies sampling the bus on both
edges, but there are currently no macros enabling it. We might make use
of such macros, so let's create:
- SPI_MEM_DTR_OP_CMD
- SPI_MEM_DTR_OP_ADDR
- SPI_MEM_DTR_OP_DUMMY
- SPI_MEM_DTR_OP_DATA_OUT
- SPI_MEM_DTR_OP_DATA_OUT

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://patch.msgid.link/20241224-winbond-6-11-rc1-quad-support-v2-19-ad218dbc406f@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h
index ca6ea01c40f85095ac2730cb424cfb21d7daa700..306c05dd13789017da2c5339cddc031f03302bb9 100644 (file)
--- a/include/linux/spi/spi-mem.h
+++ b/include/linux/spi/spi-mem.h
@@ -20,6 +20,14 @@
                .opcode = __opcode,                             \
        }
 
+#define SPI_MEM_DTR_OP_CMD(__opcode, __buswidth)               \
+       {                                                       \
+               .nbytes = 1,                                    \
+               .opcode = __opcode,                             \
+               .buswidth = __buswidth,                         \
+               .dtr = true,                                    \
+       }
+
 #define SPI_MEM_OP_ADDR(__nbytes, __val, __buswidth)           \
        {                                                       \
                .nbytes = __nbytes,                             \
@@ -27,6 +35,14 @@
                .val = __val,                                   \
        }
 
+#define SPI_MEM_DTR_OP_ADDR(__nbytes, __val, __buswidth)       \
+       {                                                       \
+               .nbytes = __nbytes,                             \
+               .val = __val,                                   \
+               .buswidth = __buswidth,                         \
+               .dtr = true,                                    \
+       }
+
 #define SPI_MEM_OP_NO_ADDR     { }
 
 #define SPI_MEM_OP_DUMMY(__nbytes, __buswidth)                 \
@@ -35,6 +51,13 @@
                .buswidth = __buswidth,                         \
        }
 
+#define SPI_MEM_DTR_OP_DUMMY(__nbytes, __buswidth)             \
+       {                                                       \
+               .nbytes = __nbytes,                             \
+               .buswidth = __buswidth,                         \
+               .dtr = true,                                    \
+       }
+
 #define SPI_MEM_OP_NO_DUMMY    { }
 
 #define SPI_MEM_OP_DATA_IN(__nbytes, __buf, __buswidth)                \
@@ -45,6 +68,15 @@
                .buf.in = __buf,                                \
        }
 
+#define SPI_MEM_DTR_OP_DATA_IN(__nbytes, __buf, __buswidth)    \
+       {                                                       \
+               .dir = SPI_MEM_DATA_IN,                         \
+               .nbytes = __nbytes,                             \
+               .buf.in = __buf,                                \
+               .buswidth = __buswidth,                         \
+               .dtr = true,                                    \
+       }
+
 #define SPI_MEM_OP_DATA_OUT(__nbytes, __buf, __buswidth)       \
        {                                                       \
                .buswidth = __buswidth,                         \
@@ -53,6 +85,15 @@
                .buf.out = __buf,                               \
        }
 
+#define SPI_MEM_DTR_OP_DATA_OUT(__nbytes, __buf, __buswidth)   \
+       {                                                       \
+               .dir = SPI_MEM_DATA_OUT,                        \
+               .nbytes = __nbytes,                             \
+               .buf.out = __buf,                               \
+               .buswidth = __buswidth,                         \
+               .dtr = true,                                    \
+       }
+
 #define SPI_MEM_OP_NO_DATA     { }
 
 /**