static void __iomem *omap2_ctrl_base;
 static s16 omap2_ctrl_offset;
-static void __iomem *omap4_ctrl_pad_base;
 static struct regmap *omap2_ctrl_syscon;
 
 #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
 static struct omap3_control_regs control_context;
 #endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */
 
-#define OMAP4_CTRL_PAD_REGADDR(reg)    (omap4_ctrl_pad_base + (reg))
-
-void __init omap2_set_globals_control(void __iomem *ctrl,
-                                     void __iomem *ctrl_pad)
+void __init omap2_set_globals_control(void __iomem *ctrl)
 {
        omap2_ctrl_base = ctrl;
-       omap4_ctrl_pad_base = ctrl_pad;
 }
 
 u8 omap_ctrl_readb(u16 offset)
                             val);
 }
 
-/*
- * On OMAP4 control pad are not addressable from control
- * core base. So the common omap_ctrl_read/write APIs breaks
- * Hence export separate APIs to manage the omap4 pad control
- * registers. This APIs will work only for OMAP4
- */
-
-u32 omap4_ctrl_pad_readl(u16 offset)
-{
-       return readl_relaxed(OMAP4_CTRL_PAD_REGADDR(offset));
-}
-
-void omap4_ctrl_pad_writel(u32 val, u16 offset)
-{
-       writel_relaxed(val, OMAP4_CTRL_PAD_REGADDR(offset));
-}
-
 #ifdef CONFIG_ARCH_OMAP3
 
 /**
 
 extern u8 omap_ctrl_readb(u16 offset);
 extern u16 omap_ctrl_readw(u16 offset);
 extern u32 omap_ctrl_readl(u16 offset);
-extern u32 omap4_ctrl_pad_readl(u16 offset);
 extern void omap_ctrl_writeb(u8 val, u16 offset);
 extern void omap_ctrl_writew(u16 val, u16 offset);
 extern void omap_ctrl_writel(u32 val, u16 offset);
-extern void omap4_ctrl_pad_writel(u32 val, u16 offset);
 
 extern void omap3_save_scratchpad_contents(void);
 extern void omap3_clear_scratchpad_contents(void);
 void omap3_ctrl_init(void);
 int omap2_control_base_init(void);
 int omap_control_init(void);
-extern void omap2_set_globals_control(void __iomem *ctrl,
-                                     void __iomem *ctrl_pad);
+void omap2_set_globals_control(void __iomem *ctrl);
 void __init omap3_control_legacy_iomap_init(void);
 #else
 #define omap_ctrl_readb(x)             0
 
        /* XXX: remove these once OMAP3 is DT only */
        if (!of_have_populated_dt()) {
                omap2_set_globals_control(
-                       OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), NULL);
+                       OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE));
                omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
                omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
                                     NULL);
 {
        omap2_set_globals_tap(OMAP443X_CLASS,
                              OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
-       omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
-                                 OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
+       omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
        omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
        omap4xxx_check_revision();
        omap4xxx_check_features();
 {
        omap2_set_globals_tap(OMAP54XX_CLASS,
                              OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
-       omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
-                                 OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
+       omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
        omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
        omap4_pm_init_early();
        omap2_prcm_base_init();
 void __init dra7xx_init_early(void)
 {
        omap2_set_globals_tap(-1, OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE));
-       omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
-                                 OMAP2_L4_IO_ADDRESS(DRA7XX_CTRL_BASE));
+       omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
        omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
        omap4_pm_init_early();
        omap2_prcm_base_init();