]> www.infradead.org Git - users/dwmw2/qemu.git/commitdiff
x86: cpu: make sure number of addressable IDs for processor cores meets the spec
authorIgor Mammedov <imammedo@redhat.com>
Tue, 24 May 2022 15:10:19 +0000 (11:10 -0400)
committerPaolo Bonzini <pbonzini@redhat.com>
Mon, 6 Jun 2022 07:26:54 +0000 (09:26 +0200)
Accourding Intel's CPUID[EAX=04H] resulting bits 31 - 26 in EAX
should be:
"
 **** The nearest power-of-2 integer that is not smaller than (1 + EAX[31:26]) is the number of unique
    Core_IDs reserved for addressing different processor cores in a physical package. Core ID is a subset of
    bits of the initial APIC ID.
"

ensure that values stored in EAX[31-26] always meets this condition.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20220524151020.2541698-2-imammedo@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
target/i386/cpu.c

index 9fdfec9d8bcc9b3845ead0c6a902995ddd4168de..94cc4a8700dee487895f3e626a5c0c0626646e1f 100644 (file)
@@ -5287,7 +5287,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
             /* QEMU gives out its own APIC IDs, never pass down bits 31..26.  */
             *eax &= ~0xFC000000;
             if ((*eax & 31) && cs->nr_cores > 1) {
-                *eax |= (cs->nr_cores - 1) << 26;
+                *eax |= (pow2ceil(cs->nr_cores) - 1) << 26;
             }
         } else if (cpu->vendor_cpuid_only && IS_AMD_CPU(env)) {
             *eax = *ebx = *ecx = *edx = 0;