drm/i915/gmch: move VGA set state to GMCH code

This is the only user for the GMCH bridge device in display. Move it to
GMCH code.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/9bd50fe508246a547cf6e7abfe44ed686a4b3e3a.1673958757.git.jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c
index 9cedeb8c2f4dc2174b9211d86596e47ac0d83750..286a0bdd28c66d8654d8b5de82676d6e500e04d8 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_vga.c
+++ b/drivers/gpu/drm/i915/display/intel_vga.c
@@ -6,9 +6,10 @@
 #include <linux/pci.h>
 #include <linux/vgaarb.h>
 
-#include <drm/i915_drm.h>
 #include <video/vga.h>
 
+#include "soc/intel_gmch.h"
+
 #include "i915_drv.h"
 #include "i915_reg.h"
 #include "intel_de.h"
@@ -98,39 +99,12 @@ void intel_vga_reset_io_mem(struct drm_i915_private *i915)
        vga_put(pdev, VGA_RSRC_LEGACY_IO);
 }
 
-static int
-intel_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
-{
-       unsigned int reg = DISPLAY_VER(i915) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
-       u16 gmch_ctrl;
-
-       if (pci_read_config_word(i915->gmch.pdev, reg, &gmch_ctrl)) {
-               drm_err(&i915->drm, "failed to read control word\n");
-               return -EIO;
-       }
-
-       if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
-               return 0;
-
-       if (enable_decode)
-               gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
-       else
-               gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
-
-       if (pci_write_config_word(i915->gmch.pdev, reg, gmch_ctrl)) {
-               drm_err(&i915->drm, "failed to write control word\n");
-               return -EIO;
-       }
-
-       return 0;
-}
-
 static unsigned int
 intel_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
 {
        struct drm_i915_private *i915 = pdev_to_i915(pdev);
 
-       intel_vga_set_state(i915, enable_decode);
+       intel_gmch_vga_set_state(i915, enable_decode);
 
        if (enable_decode)
                return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |

diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c b/drivers/gpu/drm/i915/soc/intel_gmch.c
index d5fbb7907725d24d7d564dc56df3cb4a433b3dbd..6d0204942f7a5bf03131a76f9797d2ffbf309bcf 100644 (file)
--- a/drivers/gpu/drm/i915/soc/intel_gmch.c
+++ b/drivers/gpu/drm/i915/soc/intel_gmch.c
@@ -7,6 +7,7 @@
 #include <linux/pnp.h>
 
 #include <drm/drm_managed.h>
+#include <drm/i915_drm.h>
 
 #include "i915_drv.h"
 #include "intel_gmch.h"
@@ -142,3 +143,29 @@ void intel_gmch_bar_teardown(struct drm_i915_private *i915)
        if (i915->gmch.mch_res.start)
                release_resource(&i915->gmch.mch_res);
 }
+
+int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
+{
+       unsigned int reg = DISPLAY_VER(i915) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
+       u16 gmch_ctrl;
+
+       if (pci_read_config_word(i915->gmch.pdev, reg, &gmch_ctrl)) {
+               drm_err(&i915->drm, "failed to read control word\n");
+               return -EIO;
+       }
+
+       if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
+               return 0;
+
+       if (enable_decode)
+               gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
+       else
+               gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
+
+       if (pci_write_config_word(i915->gmch.pdev, reg, gmch_ctrl)) {
+               drm_err(&i915->drm, "failed to write control word\n");
+               return -EIO;
+       }
+
+       return 0;
+}

diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.h b/drivers/gpu/drm/i915/soc/intel_gmch.h
index bbc52dbab708f84201c3c21ea8e2d71a20556a27..d0133eedc7203bbf8432fc6fac51597d1ff74ff4 100644 (file)
--- a/drivers/gpu/drm/i915/soc/intel_gmch.h
+++ b/drivers/gpu/drm/i915/soc/intel_gmch.h
@@ -6,10 +6,13 @@
 #ifndef __INTEL_GMCH_H__
 #define __INTEL_GMCH_H__
 
+#include <linux/types.h>
+
 struct drm_i915_private;
 
 int intel_gmch_bridge_setup(struct drm_i915_private *i915);
 void intel_gmch_bar_setup(struct drm_i915_private *i915);
 void intel_gmch_bar_teardown(struct drm_i915_private *i915);
+int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode);
 
 #endif /* __INTEL_GMCH_H__ */