#define EXYNOS4_PA_MDMA1              0x12840000
  #define EXYNOS4_PA_PDMA0              0x12680000
  #define EXYNOS4_PA_PDMA1              0x12690000
 +#define EXYNOS5_PA_MDMA0              0x10800000
 +#define EXYNOS5_PA_MDMA1              0x11C10000
 +#define EXYNOS5_PA_PDMA0              0x121A0000
 +#define EXYNOS5_PA_PDMA1              0x121B0000
  
  #define EXYNOS4_PA_SYSMMU_MDMA                0x10A40000
+ #define EXYNOS4_PA_SYSMMU_2D_ACP      0x10A40000
  #define EXYNOS4_PA_SYSMMU_SSS         0x10A50000
  #define EXYNOS4_PA_SYSMMU_FIMC0               0x11A20000
  #define EXYNOS4_PA_SYSMMU_FIMC1               0x11A30000