drm/i915: Rename graphics reset registers.

The graphics domains are listed as GRDOM in the documentation, and the
GDRST PCI config register (0xc0) is only valid on I965 and GM45.  Newer
chips (like Sandy Bridge) have a different GDRST.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 7209997f18fed3c8d127110d2b654edf012a2e5e..45027d5ad1e5fe7520fc79f54d0a3199de8e209b 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -330,7 +330,7 @@ int i915_resume(struct drm_device *dev)
 static int i965_reset_complete(struct drm_device *dev)
 {
        u8 gdrst;
-       pci_read_config_byte(dev->pdev, GDRST, &gdrst);
+       pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
        return gdrst & 0x1;
 }
 
@@ -375,8 +375,8 @@ int i965_reset(struct drm_device *dev, u8 flags)
         * well as the reset bit (GR/bit 0).  Setting the GR bit
         * triggers the reset; when done, the hardware will clear it.
         */
-       pci_read_config_byte(dev->pdev, GDRST, &gdrst);
-       pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | 0x1);
+       pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
+       pci_write_config_byte(dev->pdev, I965_GDRST, gdrst | flags | 0x1);
 
        /* Wait for the hardware to reset (but no more than 500 ms) */
        if (wait_for(i965_reset_complete(dev), 500)) {

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 2b5e54c2900fcaee07df3accac830ca5f38d7ec5..b1dc943a02cc3d4d377d31eca34143ece3878ff7 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -401,7 +401,7 @@ static void i915_error_work_func(struct work_struct *work)
                case 4:
                        DRM_DEBUG_DRIVER("resetting chip\n");
                        kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_event);
-                       if (!i965_reset(dev, GDRST_RENDER)) {
+                       if (!i965_reset(dev, GRDOM_RENDER)) {
                                atomic_set(&dev_priv->mm.wedged, 0);
                                kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_done_event);
                        }

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 18e3749fbd11dbea9132808aaceef0655769b2e1..565a7a3ccd4e61f44a5cd4f47ef1d2fc6d3bc85b 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -108,10 +108,12 @@
 #define   I915_GC_RENDER_CLOCK_200_MHZ (1 << 0)
 #define   I915_GC_RENDER_CLOCK_333_MHZ (4 << 0)
 #define LBB    0xf4
-#define GDRST 0xc0
-#define  GDRST_FULL    (0<<2)
-#define  GDRST_RENDER  (1<<2)
-#define  GDRST_MEDIA   (3<<2)
+
+/* Graphics reset regs */
+#define I965_GDRST 0xc0
+#define  GRDOM_FULL    (0<<2)
+#define  GRDOM_RENDER  (1<<2)
+#define  GRDOM_MEDIA   (3<<2)
 
 /* VGA stuff */