arm64: dts: nitrogen8-som: correct network PHY reset

Add the missing reset-gpios property to allow Linux to fully reset
the network PHY and fix the pinmux to add the neccessary pull-ups
for the PHY strap configuration.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-nitrogen-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-nitrogen-som.dtsi
index 36fc428ebe30008727104a4fe6e840a7098a055e..5f27d3a17ddbd1584de511cac9406853f2b6ba99 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mq-nitrogen-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq-nitrogen-som.dtsi
@@ -69,6 +69,9 @@
                        reg = <4>;
                        interrupt-parent = <&gpio1>;
                        interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+                       reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+                       reset-assert-us = <10000>;
+                       reset-deassert-us = <300>;
                };
        };
 };
@@ -191,13 +194,13 @@
                        MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2           0x1f
                        MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3           0x1f
                        MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL     0x91
-                       MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC           0x91
+                       MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC           0xd1
                        MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0           0x91
                        MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1           0x91
                        MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2           0x91
-                       MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3           0x91
-                       MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9               0x19
-                       MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11              0x59
+                       MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3           0xd1
+                       MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9               0x1
+                       MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11              0x41
                >;
        };