drm/amd/display: Add 16ms AUX RD interval W/A for specific LTTPR

[Why]
Certain display configurations require an extra delay before
reading lane status with certain LTTPR.

[How]
Add temporary workaround to force AUX RD interval to
16ms for CR and EQ. Needs to be refactored later.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: George Shen <George.Shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 81b0a01615c331f582f89598a23685b9178f817d..62510b643882754806dda1f329875788ea92b802 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -1384,6 +1384,12 @@ static enum link_training_result perform_channel_equalization_sequence(
                                        dp_translate_training_aux_read_interval(
                                                link->dpcd_caps.lttpr_caps.aux_rd_interval[offset - 1]);
 
+               if (link->dc->debug.apply_vendor_specific_lttpr_wa &&
+                               (link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
+                               link->lttpr_mode == LTTPR_MODE_TRANSPARENT) {
+                       wait_time_microsec = 16000;
+               }
+
                dp_wait_for_training_aux_rd_interval(
                                link,
                                wait_time_microsec);
@@ -1487,6 +1493,12 @@ static enum link_training_result perform_clock_recovery_sequence(
                if (link->lttpr_mode == LTTPR_MODE_NON_TRANSPARENT)
                        wait_time_microsec = TRAINING_AUX_RD_INTERVAL;
 
+               if (link->dc->debug.apply_vendor_specific_lttpr_wa &&
+                               (link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
+                               link->lttpr_mode == LTTPR_MODE_TRANSPARENT) {
+                       wait_time_microsec = 16000;
+               }
+
                dp_wait_for_training_aux_rd_interval(
                                link,
                                wait_time_microsec);