]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
arm64: dts: exynos8895: Rename PMU nodes to fixup sorting
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Sun, 22 Dec 2024 14:52:57 +0000 (15:52 +0100)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Wed, 12 Feb 2025 20:15:35 +0000 (21:15 +0100)
Nodes should be sorted by name but it is also nice to have same class of
devices together, so rename both PMU nodes (A53 and M2) to use "pmu"
prefix, instead of suffix.

Link: https://lore.kernel.org/r/20241222145257.31451-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arch/arm64/boot/dts/exynos/exynos8895.dtsi

index 1f85e1c58f00afc0342563885df785beb43572d6..f92d2a8a20a2de367b5330d51f6bf56e08a74b90 100644 (file)
                pinctrl7 = &pinctrl_peric1;
        };
 
-       arm-a53-pmu {
-               compatible = "arm,cortex-a53-pmu";
-               interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-affinity = <&cpu0>,
-                                    <&cpu1>,
-                                    <&cpu2>,
-                                    <&cpu3>;
-       };
-
-       mongoose-m2-pmu {
-               compatible = "samsung,mongoose-pmu";
-               interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-affinity = <&cpu4>,
-                                    <&cpu5>,
-                                    <&cpu6>,
-                                    <&cpu7>;
-       };
-
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
                clock-output-names = "oscclk";
        };
 
+       pmu-a53 {
+               compatible = "arm,cortex-a53-pmu";
+               interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&cpu0>,
+                                    <&cpu1>,
+                                    <&cpu2>,
+                                    <&cpu3>;
+       };
+
+       pmu-mongoose-m2 {
+               compatible = "samsung,mongoose-pmu";
+               interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&cpu4>,
+                                    <&cpu5>,
+                                    <&cpu6>,
+                                    <&cpu7>;
+       };
+
        psci {
                compatible = "arm,psci";
                method = "smc";