drm/amdgpu/navi10: add OD_RANGE for navi overclocking

So users can see the range of valid values.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/1020
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 5.5.x

diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index 7c3629f64419388fa2d1f69ab64e1c1121bffd64..a0a6dc2c190a0a3747d11aae154e085ced0108d8 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -739,6 +739,15 @@ static inline bool navi10_od_feature_is_supported(struct smu_11_0_overdrive_tabl
        return od_table->cap[feature];
 }
 
+static void navi10_od_setting_get_range(struct smu_11_0_overdrive_table *od_table,
+                                       enum SMU_11_0_ODSETTING_ID setting,
+                                       uint32_t *min, uint32_t *max)
+{
+       if (min)
+               *min = od_table->min[setting];
+       if (max)
+               *max = od_table->max[setting];
+}
 
 static int navi10_print_clk_levels(struct smu_context *smu,
                        enum smu_clk_type clk_type, char *buf)
@@ -757,6 +766,7 @@ static int navi10_print_clk_levels(struct smu_context *smu,
        OverDriveTable_t *od_table =
                (OverDriveTable_t *)table_context->overdrive_table;
        struct smu_11_0_overdrive_table *od_settings = smu->od_settings;
+       uint32_t min_value, max_value;
 
        switch (clk_type) {
        case SMU_GFXCLK:
@@ -869,6 +879,55 @@ static int navi10_print_clk_levels(struct smu_context *smu,
                        }
                        size += sprintf(buf + size, "%d: %uMHz @ %umV\n", i, curve_settings[0], curve_settings[1] / NAVI10_VOLTAGE_SCALE);
                }
+               break;
+       case SMU_OD_RANGE:
+               if (!smu->od_enabled || !od_table || !od_settings)
+                       break;
+               size = sprintf(buf, "%s:\n", "OD_RANGE");
+
+               if (navi10_od_feature_is_supported(od_settings, SMU_11_0_ODFEATURE_GFXCLK_LIMITS)) {
+                       navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_GFXCLKFMIN,
+                                                   &min_value, NULL);
+                       navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_GFXCLKFMAX,
+                                                   NULL, &max_value);
+                       size += sprintf(buf + size, "SCLK: %7uMhz %10uMhz\n",
+                                       min_value, max_value);
+               }
+
+               if (navi10_od_feature_is_supported(od_settings, SMU_11_0_ODFEATURE_UCLK_MAX)) {
+                       navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_UCLKFMAX,
+                                                   &min_value, &max_value);
+                       size += sprintf(buf + size, "MCLK: %7uMhz %10uMhz\n",
+                                       min_value, max_value);
+               }
+
+               if (navi10_od_feature_is_supported(od_settings, SMU_11_0_ODFEATURE_GFXCLK_CURVE)) {
+                       navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1,
+                                                   &min_value, &max_value);
+                       size += sprintf(buf + size, "VDDC_CURVE_SCLK[0]: %7uMhz %10uMhz\n",
+                                       min_value, max_value);
+                       navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1,
+                                                   &min_value, &max_value);
+                       size += sprintf(buf + size, "VDDC_CURVE_VOLT[0]: %7dmV %11dmV\n",
+                                       min_value, max_value);
+                       navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2,
+                                                   &min_value, &max_value);
+                       size += sprintf(buf + size, "VDDC_CURVE_SCLK[1]: %7uMhz %10uMhz\n",
+                                       min_value, max_value);
+                       navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2,
+                                                   &min_value, &max_value);
+                       size += sprintf(buf + size, "VDDC_CURVE_VOLT[1]: %7dmV %11dmV\n",
+                                       min_value, max_value);
+                       navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3,
+                                                   &min_value, &max_value);
+                       size += sprintf(buf + size, "VDDC_CURVE_SCLK[2]: %7uMhz %10uMhz\n",
+                                       min_value, max_value);
+                       navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3,
+                                                   &min_value, &max_value);
+                       size += sprintf(buf + size, "VDDC_CURVE_VOLT[2]: %7dmV %11dmV\n",
+                                       min_value, max_value);
+               }
+
                break;
        default:
                break;