dma_cookie_init(&tdc->dma_chan);
        tdc->config_init = false;
-       ret = clk_prepare_enable(tdma->dma_clk);
+
+       ret = pm_runtime_get_sync(tdma->dev);
        if (ret < 0)
-               dev_err(tdc2dev(tdc), "clk_prepare_enable failed: %d\n", ret);
-       return ret;
+               return ret;
+
+       return 0;
 }
 
 static void tegra_dma_free_chan_resources(struct dma_chan *dc)
                list_del(&sg_req->node);
                kfree(sg_req);
        }
-       clk_disable_unprepare(tdma->dma_clk);
+       pm_runtime_put(tdma->dev);
 
        tdc->slave_id = 0;
 }
        spin_lock_init(&tdma->global_lock);
 
        pm_runtime_enable(&pdev->dev);
-       if (!pm_runtime_enabled(&pdev->dev)) {
+       if (!pm_runtime_enabled(&pdev->dev))
                ret = tegra_dma_runtime_resume(&pdev->dev);
-               if (ret) {
-                       dev_err(&pdev->dev, "dma_runtime_resume failed %d\n",
-                               ret);
-                       goto err_pm_disable;
-               }
-       }
+       else
+               ret = pm_runtime_get_sync(&pdev->dev);
 
-       /* Enable clock before accessing registers */
-       ret = clk_prepare_enable(tdma->dma_clk);
        if (ret < 0) {
-               dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret);
-               goto err_pm_disable;
+               pm_runtime_disable(&pdev->dev);
+               return ret;
        }
 
        /* Reset DMA controller */
        tdma_write(tdma, TEGRA_APBDMA_CONTROL, 0);
        tdma_write(tdma, TEGRA_APBDMA_IRQ_MASK_SET, 0xFFFFFFFFul);
 
-       clk_disable_unprepare(tdma->dma_clk);
+       pm_runtime_put(&pdev->dev);
 
        INIT_LIST_HEAD(&tdma->dma_dev.channels);
        for (i = 0; i < cdata->nr_channels; i++) {
                tasklet_kill(&tdc->tasklet);
        }
 
-err_pm_disable:
        pm_runtime_disable(&pdev->dev);
        if (!pm_runtime_status_suspended(&pdev->dev))
                tegra_dma_runtime_suspend(&pdev->dev);
        int ret;
 
        /* Enable clock before accessing register */
-       ret = tegra_dma_runtime_resume(dev);
+       ret = pm_runtime_get_sync(dev);
        if (ret < 0)
                return ret;
 
        }
 
        /* Disable clock */
-       tegra_dma_runtime_suspend(dev);
+       pm_runtime_put(dev);
        return 0;
 }
 
        int ret;
 
        /* Enable clock before accessing register */
-       ret = tegra_dma_runtime_resume(dev);
+       ret = pm_runtime_get_sync(dev);
        if (ret < 0)
                return ret;
 
        }
 
        /* Disable clock */
-       tegra_dma_runtime_suspend(dev);
+       pm_runtime_put(dev);
        return 0;
 }
 #endif
 
 static const struct dev_pm_ops tegra_dma_dev_pm_ops = {
-#ifdef CONFIG_PM
-       .runtime_suspend = tegra_dma_runtime_suspend,
-       .runtime_resume = tegra_dma_runtime_resume,
-#endif
+       SET_RUNTIME_PM_OPS(tegra_dma_runtime_suspend, tegra_dma_runtime_resume,
+                          NULL)
        SET_SYSTEM_SLEEP_PM_OPS(tegra_dma_pm_suspend, tegra_dma_pm_resume)
 };