net: ipa: define fields for event-ring related registers

Define field IDs for the EV_CH_E_CNTXT_0 and EV_CH_E_CNTXT_8 GSI
registers, and populate the register definition files accordingly.
Use the reg_*() functions to access field values for those regiters,
and get rid of the previous field definition constants.

The remaining EV_CH_E_CNTXT_* registers are written with full 32-bit
values (and have no fields).

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c
index ff00c833043a9377a5f65bad87a21d76dfcd9e05..7c4e458364236baf0a868b49c5e926a9dc38daa3 100644 (file)
--- a/drivers/net/ipa/gsi.c
+++ b/drivers/net/ipa/gsi.c
@@ -163,9 +163,6 @@ static void gsi_validate_build(void)
         * ensure the elements themselves meet the requirement.
         */
        BUILD_BUG_ON(!is_power_of_2(GSI_RING_ELEMENT_SIZE));
-
-       /* The event ring element size must fit in this field */
-       BUILD_BUG_ON(GSI_RING_ELEMENT_SIZE > field_max(EV_ELEMENT_SIZE_FMASK));
 }
 
 /* Return the channel id associated with a given channel */
@@ -418,7 +415,7 @@ gsi_evt_ring_state(struct gsi *gsi, u32 evt_ring_id)
 
        val = ioread32(gsi->virt + reg_n_offset(reg, evt_ring_id));
 
-       return u32_get_bits(val, EV_CHSTATE_FMASK);
+       return reg_decode(reg, EV_CHSTATE, val);
 }
 
 /* Issue an event ring command and wait for it to complete */
@@ -739,9 +736,10 @@ static void gsi_evt_ring_program(struct gsi *gsi, u32 evt_ring_id)
 
        reg = gsi_reg(gsi, EV_CH_E_CNTXT_0);
        /* We program all event rings as GPI type/protocol */
-       val = u32_encode_bits(GSI_CHANNEL_TYPE_GPI, EV_CHTYPE_FMASK);
-       val |= EV_INTYPE_FMASK;
-       val |= u32_encode_bits(GSI_RING_ELEMENT_SIZE, EV_ELEMENT_SIZE_FMASK);
+       val = reg_encode(reg, EV_CHTYPE, GSI_CHANNEL_TYPE_GPI);
+       /* EV_EE field is 0 (GSI_EE_AP) */
+       val |= reg_bit(reg, EV_INTYPE);
+       val |= reg_encode(reg, EV_ELEMENT_SIZE, GSI_RING_ELEMENT_SIZE);
        iowrite32(val, gsi->virt + reg_n_offset(reg, evt_ring_id));
 
        reg = gsi_reg(gsi, EV_CH_E_CNTXT_1);
@@ -763,11 +761,12 @@ static void gsi_evt_ring_program(struct gsi *gsi, u32 evt_ring_id)
 
        /* Enable interrupt moderation by setting the moderation delay */
        reg = gsi_reg(gsi, EV_CH_E_CNTXT_8);
-       val = u32_encode_bits(GSI_EVT_RING_INT_MODT, MODT_FMASK);
-       val |= u32_encode_bits(1, MODC_FMASK);  /* comes from channel */
+       val = reg_encode(reg, EV_MODT, GSI_EVT_RING_INT_MODT);
+       val = reg_encode(reg, EV_MODC, 1);      /* comes from channel */
+       /* EV_MOD_CNT is 0 (no counter-based interrupt coalescing) */
        iowrite32(val, gsi->virt + reg_n_offset(reg, evt_ring_id));
 
-       /* No MSI write data, and MSI address high and low address is 0 */
+       /* No MSI write data, and MSI high and low address is 0 */
        reg = gsi_reg(gsi, EV_CH_E_CNTXT_9);
        iowrite32(0, gsi->virt + reg_n_offset(reg, evt_ring_id));
 

diff --git a/drivers/net/ipa/gsi_reg.h b/drivers/net/ipa/gsi_reg.h
index 3f1a49a4f7c47124cc358fb7ed2c77b9e0aafd37..acd06a0de93b318b3bb21cd9d65ce5175348ce7f 100644 (file)
--- a/drivers/net/ipa/gsi_reg.h
+++ b/drivers/net/ipa/gsi_reg.h
@@ -146,18 +146,21 @@ enum gsi_prefetch_mode {
 };
 
 /* EV_CH_E_CNTXT_0 register */
-/* enum gsi_channel_type defines EV_CHTYPE field values in EV_CH_E_CNTXT_0 */
-#define EV_CHTYPE_FMASK                        GENMASK(3, 0)
-#define EV_EE_FMASK                    GENMASK(7, 4)
-#define EV_EVCHID_FMASK                        GENMASK(15, 8)
-#define EV_INTYPE_FMASK                        GENMASK(16, 16)
-#define EV_CHSTATE_FMASK               GENMASK(23, 20)
-#define EV_ELEMENT_SIZE_FMASK          GENMASK(31, 24)
+enum gsi_reg_ch_c_ev_ch_e_cntxt_0_field_id {
+       EV_CHTYPE,      /* enum gsi_channel_type */
+       EV_EE,          /* enum gsi_ee_id; always GSI_EE_AP for us */
+       EV_EVCHID,
+       EV_INTYPE,
+       EV_CHSTATE,
+       EV_ELEMENT_SIZE,
+};
 
 /* EV_CH_E_CNTXT_8 register */
-#define MODT_FMASK                     GENMASK(15, 0)
-#define MODC_FMASK                     GENMASK(23, 16)
-#define MOD_CNT_FMASK                  GENMASK(31, 24)
+enum gsi_reg_ch_c_ev_ch_e_cntxt_8_field_id {
+       EV_MODT,
+       EV_MODC,
+       EV_MOD_CNT,
+};
 
 /* GSI_STATUS register */
 #define ENABLED_FMASK                  GENMASK(0, 0)

diff --git a/drivers/net/ipa/reg/gsi_reg-v3.1.c b/drivers/net/ipa/reg/gsi_reg-v3.1.c
index 4aa7a1c52cb353f1356266fe74ef7d23fa8f949f..36595b21dff7b757fdfcfe39034c077cb07a8819 100644 (file)
--- a/drivers/net/ipa/reg/gsi_reg-v3.1.c
+++ b/drivers/net/ipa/reg/gsi_reg-v3.1.c
@@ -71,8 +71,18 @@ REG_STRIDE(CH_C_SCRATCH_2, ch_c_scratch_2,
 REG_STRIDE(CH_C_SCRATCH_3, ch_c_scratch_3,
           0x0001c06c + 0x4000 * GSI_EE_AP, 0x80);
 
-REG_STRIDE(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,
-          0x0001d000 + 0x4000 * GSI_EE_AP, 0x80);
+static const u32 reg_ev_ch_e_cntxt_0_fmask[] = {
+       [EV_CHTYPE]                                     = GENMASK(3, 0),
+       [EV_EE]                                         = GENMASK(7, 4),
+       [EV_EVCHID]                                     = GENMASK(15, 8),
+       [EV_INTYPE]                                     = BIT(16),
+                                               /* Bits 17-19 reserved */
+       [EV_CHSTATE]                                    = GENMASK(23, 20),
+       [EV_ELEMENT_SIZE]                               = GENMASK(31, 24),
+};
+
+REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,
+                 0x0001d000 + 0x4000 * GSI_EE_AP, 0x80);
 
 REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
           0x0001d004 + 0x4000 * GSI_EE_AP, 0x80);
@@ -86,8 +96,14 @@ REG_STRIDE(EV_CH_E_CNTXT_3, ev_ch_e_cntxt_3,
 REG_STRIDE(EV_CH_E_CNTXT_4, ev_ch_e_cntxt_4,
           0x0001d010 + 0x4000 * GSI_EE_AP, 0x80);
 
-REG_STRIDE(EV_CH_E_CNTXT_8, ev_ch_e_cntxt_8,
-          0x0001d020 + 0x4000 * GSI_EE_AP, 0x80);
+static const u32 reg_ev_ch_e_cntxt_8_fmask[] = {
+       [EV_MODT]                                       = GENMASK(15, 0),
+       [EV_MODC]                                       = GENMASK(23, 16),
+       [EV_MOD_CNT]                                    = GENMASK(31, 24),
+};
+
+REG_STRIDE_FIELDS(EV_CH_E_CNTXT_8, ev_ch_e_cntxt_8,
+                 0x0001d020 + 0x4000 * GSI_EE_AP, 0x80);
 
 REG_STRIDE(EV_CH_E_CNTXT_9, ev_ch_e_cntxt_9,
           0x0001d024 + 0x4000 * GSI_EE_AP, 0x80);

diff --git a/drivers/net/ipa/reg/gsi_reg-v3.5.1.c b/drivers/net/ipa/reg/gsi_reg-v3.5.1.c
index 045061a870032add9775bdd29f751030207a51ae..a30bfbfa6c1fd271aabe32fb96dc649eaaf716b1 100644 (file)
--- a/drivers/net/ipa/reg/gsi_reg-v3.5.1.c
+++ b/drivers/net/ipa/reg/gsi_reg-v3.5.1.c
@@ -71,8 +71,18 @@ REG_STRIDE(CH_C_SCRATCH_2, ch_c_scratch_2,
 REG_STRIDE(CH_C_SCRATCH_3, ch_c_scratch_3,
           0x0001c06c + 0x4000 * GSI_EE_AP, 0x80);
 
-REG_STRIDE(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,
-          0x0001d000 + 0x4000 * GSI_EE_AP, 0x80);
+static const u32 reg_ev_ch_e_cntxt_0_fmask[] = {
+       [EV_CHTYPE]                                     = GENMASK(3, 0),
+       [EV_EE]                                         = GENMASK(7, 4),
+       [EV_EVCHID]                                     = GENMASK(15, 8),
+       [EV_INTYPE]                                     = BIT(16),
+                                               /* Bits 17-19 reserved */
+       [EV_CHSTATE]                                    = GENMASK(23, 20),
+       [EV_ELEMENT_SIZE]                               = GENMASK(31, 24),
+};
+
+REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,
+                 0x0001d000 + 0x4000 * GSI_EE_AP, 0x80);
 
 REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
           0x0001d004 + 0x4000 * GSI_EE_AP, 0x80);
@@ -86,8 +96,14 @@ REG_STRIDE(EV_CH_E_CNTXT_3, ev_ch_e_cntxt_3,
 REG_STRIDE(EV_CH_E_CNTXT_4, ev_ch_e_cntxt_4,
           0x0001d010 + 0x4000 * GSI_EE_AP, 0x80);
 
-REG_STRIDE(EV_CH_E_CNTXT_8, ev_ch_e_cntxt_8,
-          0x0001d020 + 0x4000 * GSI_EE_AP, 0x80);
+static const u32 reg_ev_ch_e_cntxt_8_fmask[] = {
+       [EV_MODT]                                       = GENMASK(15, 0),
+       [EV_MODC]                                       = GENMASK(23, 16),
+       [EV_MOD_CNT]                                    = GENMASK(31, 24),
+};
+
+REG_STRIDE_FIELDS(EV_CH_E_CNTXT_8, ev_ch_e_cntxt_8,
+                 0x0001d020 + 0x4000 * GSI_EE_AP, 0x80);
 
 REG_STRIDE(EV_CH_E_CNTXT_9, ev_ch_e_cntxt_9,
           0x0001d024 + 0x4000 * GSI_EE_AP, 0x80);

diff --git a/drivers/net/ipa/reg/gsi_reg-v4.0.c b/drivers/net/ipa/reg/gsi_reg-v4.0.c
index 3374d4e9272d866bebb34b558251bbc61d23e82c..c0042fb9e760fb9d07b958cf996d148f843cd644 100644 (file)
--- a/drivers/net/ipa/reg/gsi_reg-v4.0.c
+++ b/drivers/net/ipa/reg/gsi_reg-v4.0.c
@@ -72,8 +72,18 @@ REG_STRIDE(CH_C_SCRATCH_2, ch_c_scratch_2,
 REG_STRIDE(CH_C_SCRATCH_3, ch_c_scratch_3,
           0x0001c06c + 0x4000 * GSI_EE_AP, 0x80);
 
-REG_STRIDE(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,
-          0x0001d000 + 0x4000 * GSI_EE_AP, 0x80);
+static const u32 reg_ev_ch_e_cntxt_0_fmask[] = {
+       [EV_CHTYPE]                                     = GENMASK(3, 0),
+       [EV_EE]                                         = GENMASK(7, 4),
+       [EV_EVCHID]                                     = GENMASK(15, 8),
+       [EV_INTYPE]                                     = BIT(16),
+                                               /* Bits 17-19 reserved */
+       [EV_CHSTATE]                                    = GENMASK(23, 20),
+       [EV_ELEMENT_SIZE]                               = GENMASK(31, 24),
+};
+
+REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,
+                 0x0001d000 + 0x4000 * GSI_EE_AP, 0x80);
 
 REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
           0x0001d004 + 0x4000 * GSI_EE_AP, 0x80);
@@ -87,8 +97,14 @@ REG_STRIDE(EV_CH_E_CNTXT_3, ev_ch_e_cntxt_3,
 REG_STRIDE(EV_CH_E_CNTXT_4, ev_ch_e_cntxt_4,
           0x0001d010 + 0x4000 * GSI_EE_AP, 0x80);
 
-REG_STRIDE(EV_CH_E_CNTXT_8, ev_ch_e_cntxt_8,
-          0x0001d020 + 0x4000 * GSI_EE_AP, 0x80);
+static const u32 reg_ev_ch_e_cntxt_8_fmask[] = {
+       [EV_MODT]                                       = GENMASK(15, 0),
+       [EV_MODC]                                       = GENMASK(23, 16),
+       [EV_MOD_CNT]                                    = GENMASK(31, 24),
+};
+
+REG_STRIDE_FIELDS(EV_CH_E_CNTXT_8, ev_ch_e_cntxt_8,
+                 0x0001d020 + 0x4000 * GSI_EE_AP, 0x80);
 
 REG_STRIDE(EV_CH_E_CNTXT_9, ev_ch_e_cntxt_9,
           0x0001d024 + 0x4000 * GSI_EE_AP, 0x80);

diff --git a/drivers/net/ipa/reg/gsi_reg-v4.5.c b/drivers/net/ipa/reg/gsi_reg-v4.5.c
index 0502f3e635dab25a8ea7bfe4022029f9477b47e4..ace13fb2d5d2ba3ee30d6def54b938d544c6ca2b 100644 (file)
--- a/drivers/net/ipa/reg/gsi_reg-v4.5.c
+++ b/drivers/net/ipa/reg/gsi_reg-v4.5.c
@@ -74,8 +74,18 @@ REG_STRIDE(CH_C_SCRATCH_2, ch_c_scratch_2,
 REG_STRIDE(CH_C_SCRATCH_3, ch_c_scratch_3,
           0x0001c06c + 0x4000 * GSI_EE_AP, 0x80);
 
-REG_STRIDE(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,
-          0x0001d000 + 0x4000 * GSI_EE_AP, 0x80);
+static const u32 reg_ev_ch_e_cntxt_0_fmask[] = {
+       [EV_CHTYPE]                                     = GENMASK(3, 0),
+       [EV_EE]                                         = GENMASK(7, 4),
+       [EV_EVCHID]                                     = GENMASK(15, 8),
+       [EV_INTYPE]                                     = BIT(16),
+                                               /* Bits 17-19 reserved */
+       [EV_CHSTATE]                                    = GENMASK(23, 20),
+       [EV_ELEMENT_SIZE]                               = GENMASK(31, 24),
+};
+
+REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,
+                 0x0001d000 + 0x4000 * GSI_EE_AP, 0x80);
 
 REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
           0x0001d004 + 0x4000 * GSI_EE_AP, 0x80);
@@ -89,8 +99,14 @@ REG_STRIDE(EV_CH_E_CNTXT_3, ev_ch_e_cntxt_3,
 REG_STRIDE(EV_CH_E_CNTXT_4, ev_ch_e_cntxt_4,
           0x0001d010 + 0x4000 * GSI_EE_AP, 0x80);
 
-REG_STRIDE(EV_CH_E_CNTXT_8, ev_ch_e_cntxt_8,
-          0x0001d020 + 0x4000 * GSI_EE_AP, 0x80);
+static const u32 reg_ev_ch_e_cntxt_8_fmask[] = {
+       [EV_MODT]                                       = GENMASK(15, 0),
+       [EV_MODC]                                       = GENMASK(23, 16),
+       [EV_MOD_CNT]                                    = GENMASK(31, 24),
+};
+
+REG_STRIDE_FIELDS(EV_CH_E_CNTXT_8, ev_ch_e_cntxt_8,
+                 0x0001d020 + 0x4000 * GSI_EE_AP, 0x80);
 
 REG_STRIDE(EV_CH_E_CNTXT_9, ev_ch_e_cntxt_9,
           0x0001d024 + 0x4000 * GSI_EE_AP, 0x80);

diff --git a/drivers/net/ipa/reg/gsi_reg-v4.9.c b/drivers/net/ipa/reg/gsi_reg-v4.9.c
index 2c61633fdb427960e545411c68b4fb0c2418d700..5d6670993fa8386e6624f43373f01029473eb2fe 100644 (file)
--- a/drivers/net/ipa/reg/gsi_reg-v4.9.c
+++ b/drivers/net/ipa/reg/gsi_reg-v4.9.c
@@ -75,8 +75,18 @@ REG_STRIDE(CH_C_SCRATCH_2, ch_c_scratch_2,
 REG_STRIDE(CH_C_SCRATCH_3, ch_c_scratch_3,
           0x0001c06c + 0x4000 * GSI_EE_AP, 0x80);
 
-REG_STRIDE(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,
-          0x0001d000 + 0x4000 * GSI_EE_AP, 0x80);
+static const u32 reg_ev_ch_e_cntxt_0_fmask[] = {
+       [EV_CHTYPE]                                     = GENMASK(3, 0),
+       [EV_EE]                                         = GENMASK(7, 4),
+       [EV_EVCHID]                                     = GENMASK(15, 8),
+       [EV_INTYPE]                                     = BIT(16),
+                                               /* Bits 17-19 reserved */
+       [EV_CHSTATE]                                    = GENMASK(23, 20),
+       [EV_ELEMENT_SIZE]                               = GENMASK(31, 24),
+};
+
+REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,
+                 0x0001d000 + 0x4000 * GSI_EE_AP, 0x80);
 
 REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
           0x0001d004 + 0x4000 * GSI_EE_AP, 0x80);
@@ -90,8 +100,14 @@ REG_STRIDE(EV_CH_E_CNTXT_3, ev_ch_e_cntxt_3,
 REG_STRIDE(EV_CH_E_CNTXT_4, ev_ch_e_cntxt_4,
           0x0001d010 + 0x4000 * GSI_EE_AP, 0x80);
 
-REG_STRIDE(EV_CH_E_CNTXT_8, ev_ch_e_cntxt_8,
-          0x0001d020 + 0x4000 * GSI_EE_AP, 0x80);
+static const u32 reg_ev_ch_e_cntxt_8_fmask[] = {
+       [EV_MODT]                                       = GENMASK(15, 0),
+       [EV_MODC]                                       = GENMASK(23, 16),
+       [EV_MOD_CNT]                                    = GENMASK(31, 24),
+};
+
+REG_STRIDE_FIELDS(EV_CH_E_CNTXT_8, ev_ch_e_cntxt_8,
+                 0x0001d020 + 0x4000 * GSI_EE_AP, 0x80);
 
 REG_STRIDE(EV_CH_E_CNTXT_9, ev_ch_e_cntxt_9,
           0x0001d024 + 0x4000 * GSI_EE_AP, 0x80);