Use static arrays instead.
Suggested-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Acked-by: Eduardo Habkost <ehabkost@redhat.com>
static void virt_machine_2_8_options(MachineClass *mc)
{
VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
- static GlobalProperty compat[] = {
- HW_COMPAT_2_8
- };
virt_machine_2_9_options(mc);
- compat_props_add(mc->compat_props, compat, G_N_ELEMENTS(compat));
+ compat_props_add(mc->compat_props, hw_compat_2_8, hw_compat_2_8_len);
/* For 2.8 and earlier we falsely claimed in the DT that
* our timers were edge-triggered, not level-triggered.
*/
#include "sysemu/numa.h"
#include "qemu/error-report.h"
#include "sysemu/qtest.h"
+#include "hw/pci/pci.h"
GlobalProperty hw_compat_3_1[] = {
{
};
const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9);
+GlobalProperty hw_compat_2_8[] = {
+ {
+ .driver = "fw_cfg_mem",
+ .property = "x-file-slots",
+ .value = stringify(0x10),
+ },{
+ .driver = "fw_cfg_io",
+ .property = "x-file-slots",
+ .value = stringify(0x10),
+ },{
+ .driver = "pflash_cfi01",
+ .property = "old-multiple-chip-handling",
+ .value = "on",
+ },{
+ .driver = "pci-bridge",
+ .property = "shpc",
+ .value = "on",
+ },{
+ .driver = TYPE_PCI_DEVICE,
+ .property = "x-pcie-extcap-init",
+ .value = "off",
+ },{
+ .driver = "virtio-pci",
+ .property = "x-pcie-deverr-init",
+ .value = "off",
+ },{
+ .driver = "virtio-pci",
+ .property = "x-pcie-lnkctl-init",
+ .value = "off",
+ },{
+ .driver = "virtio-pci",
+ .property = "x-pcie-pm-init",
+ .value = "off",
+ },{
+ .driver = "cirrus-vga",
+ .property = "vgamem_mb",
+ .value = "8",
+ },{
+ .driver = "isa-cirrus-vga",
+ .property = "vgamem_mb",
+ .value = "8",
+ },
+};
+const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8);
+
static char *machine_get_accel(Object *obj, Error **errp)
{
MachineState *ms = MACHINE(obj);
};
const size_t pc_compat_2_9_len = G_N_ELEMENTS(pc_compat_2_9);
+GlobalProperty pc_compat_2_8[] = {
+ {
+ .driver = TYPE_X86_CPU,
+ .property = "tcg-cpuid",
+ .value = "off",
+ },
+ {
+ .driver = "kvmclock",
+ .property = "x-mach-use-reliable-get-clock",
+ .value = "off",
+ },
+ {
+ .driver = "ICH9-LPC",
+ .property = "x-smi-broadcast",
+ .value = "off",
+ },
+ {
+ .driver = TYPE_X86_CPU,
+ .property = "vmware-cpuid-freq",
+ .value = "off",
+ },
+ {
+ .driver = "Haswell-" TYPE_X86_CPU,
+ .property = "stepping",
+ .value = "1",
+ },
+};
+const size_t pc_compat_2_8_len = G_N_ELEMENTS(pc_compat_2_8);
+
void gsi_handler(void *opaque, int n, int level)
{
GSIState *s = opaque;
static void pc_i440fx_2_8_machine_options(MachineClass *m)
{
- static GlobalProperty compat[] = {
- PC_COMPAT_2_8
- };
-
pc_i440fx_2_9_machine_options(m);
- compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
+ compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
+ compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
}
DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL,
static void pc_q35_2_8_machine_options(MachineClass *m)
{
- static GlobalProperty compat[] = {
- PC_COMPAT_2_8
- };
-
pc_q35_2_9_machine_options(m);
- compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
+ compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
+ compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
}
DEFINE_Q35_MACHINE(v2_8, "pc-q35-2.8", NULL,
static void spapr_machine_2_8_class_options(MachineClass *mc)
{
static GlobalProperty compat[] = {
- HW_COMPAT_2_8
{
.driver = TYPE_SPAPR_PCI_HOST_BRIDGE,
.property = "pcie-extended-configuration-space",
};
spapr_machine_2_9_class_options(mc);
+ compat_props_add(mc->compat_props, hw_compat_2_8, hw_compat_2_8_len);
compat_props_add(mc->compat_props, compat, G_N_ELEMENTS(compat));
mc->numa_mem_align_shift = 23;
}
static void ccw_machine_2_8_class_options(MachineClass *mc)
{
static GlobalProperty compat[] = {
- HW_COMPAT_2_8
{
.driver = TYPE_S390_FLIC_COMMON,
.property = "adapter_routes_max_batch",
};
ccw_machine_2_9_class_options(mc);
+ compat_props_add(mc->compat_props, hw_compat_2_8, hw_compat_2_8_len);
compat_props_add(mc->compat_props, compat, G_N_ELEMENTS(compat));
}
DEFINE_CCW_MACHINE(2_8, "2.8", false);
extern GlobalProperty hw_compat_2_9[];
extern const size_t hw_compat_2_9_len;
+extern GlobalProperty hw_compat_2_8[];
+extern const size_t hw_compat_2_8_len;
+
#endif
#ifndef HW_COMPAT_H
#define HW_COMPAT_H
-#define HW_COMPAT_2_8 \
- {\
- .driver = "fw_cfg_mem",\
- .property = "x-file-slots",\
- .value = stringify(0x10),\
- },{\
- .driver = "fw_cfg_io",\
- .property = "x-file-slots",\
- .value = stringify(0x10),\
- },{\
- .driver = "pflash_cfi01",\
- .property = "old-multiple-chip-handling",\
- .value = "on",\
- },{\
- .driver = "pci-bridge",\
- .property = "shpc",\
- .value = "on",\
- },{\
- .driver = TYPE_PCI_DEVICE,\
- .property = "x-pcie-extcap-init",\
- .value = "off",\
- },{\
- .driver = "virtio-pci",\
- .property = "x-pcie-deverr-init",\
- .value = "off",\
- },{\
- .driver = "virtio-pci",\
- .property = "x-pcie-lnkctl-init",\
- .value = "off",\
- },{\
- .driver = "virtio-pci",\
- .property = "x-pcie-pm-init",\
- .value = "off",\
- },{\
- .driver = "cirrus-vga",\
- .property = "vgamem_mb",\
- .value = "8",\
- },{\
- .driver = "isa-cirrus-vga",\
- .property = "vgamem_mb",\
- .value = "8",\
- },
-
#define HW_COMPAT_2_7 \
{\
.driver = "virtio-pci",\
extern GlobalProperty pc_compat_2_9[];
extern const size_t pc_compat_2_9_len;
-#define PC_COMPAT_2_8 \
- HW_COMPAT_2_8 \
- {\
- .driver = TYPE_X86_CPU,\
- .property = "tcg-cpuid",\
- .value = "off",\
- },\
- {\
- .driver = "kvmclock",\
- .property = "x-mach-use-reliable-get-clock",\
- .value = "off",\
- },\
- {\
- .driver = "ICH9-LPC",\
- .property = "x-smi-broadcast",\
- .value = "off",\
- },\
- {\
- .driver = TYPE_X86_CPU,\
- .property = "vmware-cpuid-freq",\
- .value = "off",\
- },\
- {\
- .driver = "Haswell-" TYPE_X86_CPU,\
- .property = "stepping",\
- .value = "1",\
- },
+extern GlobalProperty pc_compat_2_8[];
+extern const size_t pc_compat_2_8_len;
#define PC_COMPAT_2_7 \
HW_COMPAT_2_7 \