drm/xe/nvm: Use root tile mmio

To allow initialization of nvm during early probe for future usecases,
use root tile instead of root gt to access mmios, as gt is not
yet initialized at early probe.

v2: fix commit message (Lucas)

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20250825103537.2551837-1-riana.tauro@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_nvm.c b/drivers/gpu/drm/xe/xe_nvm.c
index 61b0a1531a539ba40014f8fa1b1e507ae6de29cd..9ca4a5ae1693ad7616a5e428f83ee0b9570a220b 100644 (file)
--- a/drivers/gpu/drm/xe/xe_nvm.c
+++ b/drivers/gpu/drm/xe/xe_nvm.c
@@ -39,17 +39,17 @@ static void xe_nvm_release_dev(struct device *dev)
 
 static bool xe_nvm_non_posted_erase(struct xe_device *xe)
 {
-       struct xe_gt *gt = xe_root_mmio_gt(xe);
+       struct xe_mmio *mmio = xe_root_tile_mmio(xe);
 
        if (xe->info.platform != XE_BATTLEMAGE)
                return false;
-       return !(xe_mmio_read32(&gt->mmio, XE_REG(GEN12_CNTL_PROTECTED_NVM_REG)) &
+       return !(xe_mmio_read32(mmio, XE_REG(GEN12_CNTL_PROTECTED_NVM_REG)) &
                 NVM_NON_POSTED_ERASE_CHICKEN_BIT);
 }
 
 static bool xe_nvm_writable_override(struct xe_device *xe)
 {
-       struct xe_gt *gt = xe_root_mmio_gt(xe);
+       struct xe_mmio *mmio = xe_root_tile_mmio(xe);
        bool writable_override;
        resource_size_t base;
 
@@ -72,7 +72,7 @@ static bool xe_nvm_writable_override(struct xe_device *xe)
        }
 
        writable_override =
-               !(xe_mmio_read32(&gt->mmio, HECI_FWSTS2(base)) &
+               !(xe_mmio_read32(mmio, HECI_FWSTS2(base)) &
                  HECI_FW_STATUS_2_NVM_ACCESS_MODE);
        if (writable_override)
                drm_info(&xe->drm, "NVM access overridden by jumper\n");