IB/mlx5: Assign DSCP for R-RoCE QPs Address Path

For Routable RoCE QPs, the DSCP should be set in the QP's
address path.

The DSCP's value is derived from the traffic class.

Fixes: 2811ba51b049 ("IB/mlx5: Add RoCE fields to Address Vector")
Cc: Achiad Shochat <achiad@mellanox.com>
Signed-off-by: Majd Dibbiny <majd@mellanox.com>
Reviewed-by: Moni Shoua <monis@mellanox.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Reviewed-by: Yuval Shaia <yuval.shaia@oracle.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>

diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c
index 1dea4073d83f6567f01ee607efe303c6d90c3f19..6a81f0273f4545d0f2d5c9918f83014a95ea9aaf 100644 (file)
--- a/drivers/infiniband/hw/mlx5/main.c
+++ b/drivers/infiniband/hw/mlx5/main.c
@@ -325,6 +325,27 @@ __be16 mlx5_get_roce_udp_sport(struct mlx5_ib_dev *dev, u8 port_num,
        return cpu_to_be16(MLX5_CAP_ROCE(dev->mdev, r_roce_min_src_udp_port));
 }
 
+int mlx5_get_roce_gid_type(struct mlx5_ib_dev *dev, u8 port_num,
+                          int index, enum ib_gid_type *gid_type)
+{
+       struct ib_gid_attr attr;
+       union ib_gid gid;
+       int ret;
+
+       ret = ib_get_cached_gid(&dev->ib_dev, port_num, index, &gid, &attr);
+       if (ret)
+               return ret;
+
+       if (!attr.ndev)
+               return -ENODEV;
+
+       dev_put(attr.ndev);
+
+       *gid_type = attr.gid_type;
+
+       return 0;
+}
+
 static int mlx5_use_mad_ifc(struct mlx5_ib_dev *dev)
 {
        if (MLX5_CAP_GEN(dev->mdev, port_type) == MLX5_CAP_PORT_TYPE_IB)

diff --git a/drivers/infiniband/hw/mlx5/mlx5_ib.h b/drivers/infiniband/hw/mlx5/mlx5_ib.h
index e1a4b93dce6b5957ac0a0ab4941e178e290c0e89..dda01d7e8847e3bc98da3ae302bb3b4cd7937e82 100644 (file)
--- a/drivers/infiniband/hw/mlx5/mlx5_ib.h
+++ b/drivers/infiniband/hw/mlx5/mlx5_ib.h
@@ -872,6 +872,8 @@ int mlx5_ib_set_vf_guid(struct ib_device *device, int vf, u8 port,
 
 __be16 mlx5_get_roce_udp_sport(struct mlx5_ib_dev *dev, u8 port_num,
                               int index);
+int mlx5_get_roce_gid_type(struct mlx5_ib_dev *dev, u8 port_num,
+                          int index, enum ib_gid_type *gid_type);
 
 /* GSI QP helper functions */
 struct ib_qp *mlx5_ib_gsi_create_qp(struct ib_pd *pd,

diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c
index 9af9b953ce30a1f1d35141dfcaf646e66977b74e..e22d9572ae8fa59cc0e8304d2f430e954879d968 100644 (file)
--- a/drivers/infiniband/hw/mlx5/qp.c
+++ b/drivers/infiniband/hw/mlx5/qp.c
@@ -2198,6 +2198,7 @@ static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
 {
        enum rdma_link_layer ll = rdma_port_get_link_layer(&dev->ib_dev, port);
        int err;
+       enum ib_gid_type gid_type;
 
        if (attr_mask & IB_QP_PKEY_INDEX)
                path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index :
@@ -2216,10 +2217,16 @@ static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
        if (ll == IB_LINK_LAYER_ETHERNET) {
                if (!(ah->ah_flags & IB_AH_GRH))
                        return -EINVAL;
+               err = mlx5_get_roce_gid_type(dev, port, ah->grh.sgid_index,
+                                            &gid_type);
+               if (err)
+                       return err;
                memcpy(path->rmac, ah->dmac, sizeof(ah->dmac));
                path->udp_sport = mlx5_get_roce_udp_sport(dev, port,
                                                          ah->grh.sgid_index);
                path->dci_cfi_prio_sl = (ah->sl & 0x7) << 4;
+               if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP)
+                       path->ecn_dscp = (ah->grh.traffic_class >> 2) & 0x3f;
        } else {
                path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0;
                path->fl_free_ar |=