#define GM107_DISP                                    /* cl5070.h */ 0x00009470
 #define GM200_DISP                                    /* cl5070.h */ 0x00009570
 #define GP100_DISP                                    /* cl5070.h */ 0x00009770
-#define GP104_DISP                                    /* cl5070.h */ 0x00009870
+#define GP102_DISP                                    /* cl5070.h */ 0x00009870
 
 #define NV31_MPEG                                                    0x00003174
 #define G82_MPEG                                                     0x00008274
 #define GM107_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000947d
 #define GM200_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000957d
 #define GP100_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000977d
-#define GP104_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000987d
+#define GP102_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000987d
 
 #define NV50_DISP_OVERLAY_CHANNEL_DMA                 /* cl507e.h */ 0x0000507e
 #define G82_DISP_OVERLAY_CHANNEL_DMA                  /* cl507e.h */ 0x0000827e
 
 int gm107_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
 int gm200_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
 int gp100_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int gp104_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
+int gp102_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
 #endif
 
 
        if (nouveau_modeset != 2 && drm->vbios.dcb.entries) {
                static const u16 oclass[] = {
-                       GP104_DISP,
+                       GP102_DISP,
                        GP100_DISP,
                        GM200_DISP,
                        GM107_DISP,
 
                .pushbuf = 0xb0007d00,
        };
        static const s32 oclass[] = {
-               GP104_DISP_CORE_CHANNEL_DMA,
+               GP102_DISP_CORE_CHANNEL_DMA,
                GP100_DISP_CORE_CHANNEL_DMA,
                GM200_DISP_CORE_CHANNEL_DMA,
                GM107_DISP_CORE_CHANNEL_DMA,
 
        .ce[1] = gp102_ce_new,
        .ce[2] = gp102_ce_new,
        .ce[3] = gp102_ce_new,
-       .disp = gp104_disp_new,
+       .disp = gp102_disp_new,
        .dma = gf119_dma_new,
        .fifo = gp100_fifo_new,
 };
        .ce[1] = gp102_ce_new,
        .ce[2] = gp102_ce_new,
        .ce[3] = gp102_ce_new,
-       .disp = gp104_disp_new,
+       .disp = gp102_disp_new,
        .dma = gf119_dma_new,
        .fifo = gp100_fifo_new,
 };
 
 nvkm-y += nvkm/engine/disp/gm107.o
 nvkm-y += nvkm/engine/disp/gm200.o
 nvkm-y += nvkm/engine/disp/gp100.o
-nvkm-y += nvkm/engine/disp/gp104.o
+nvkm-y += nvkm/engine/disp/gp102.o
 
 nvkm-y += nvkm/engine/disp/outp.o
 nvkm-y += nvkm/engine/disp/outpdp.o
 nvkm-y += nvkm/engine/disp/rootgm107.o
 nvkm-y += nvkm/engine/disp/rootgm200.o
 nvkm-y += nvkm/engine/disp/rootgp100.o
-nvkm-y += nvkm/engine/disp/rootgp104.o
+nvkm-y += nvkm/engine/disp/rootgp102.o
 
 nvkm-y += nvkm/engine/disp/channv50.o
 nvkm-y += nvkm/engine/disp/changf119.o
 
 nvkm-y += nvkm/engine/disp/dmacnv50.o
 nvkm-y += nvkm/engine/disp/dmacgf119.o
-nvkm-y += nvkm/engine/disp/dmacgp104.o
+nvkm-y += nvkm/engine/disp/dmacgp102.o
 
 nvkm-y += nvkm/engine/disp/basenv50.o
 nvkm-y += nvkm/engine/disp/baseg84.o
 nvkm-y += nvkm/engine/disp/basegf119.o
 nvkm-y += nvkm/engine/disp/basegk104.o
 nvkm-y += nvkm/engine/disp/basegk110.o
-nvkm-y += nvkm/engine/disp/basegp104.o
+nvkm-y += nvkm/engine/disp/basegp102.o
 
 nvkm-y += nvkm/engine/disp/corenv50.o
 nvkm-y += nvkm/engine/disp/coreg84.o
 nvkm-y += nvkm/engine/disp/coregm107.o
 nvkm-y += nvkm/engine/disp/coregm200.o
 nvkm-y += nvkm/engine/disp/coregp100.o
-nvkm-y += nvkm/engine/disp/coregp104.o
+nvkm-y += nvkm/engine/disp/coregp102.o
 
 nvkm-y += nvkm/engine/disp/ovlynv50.o
 nvkm-y += nvkm/engine/disp/ovlyg84.o
 nvkm-y += nvkm/engine/disp/ovlygt215.o
 nvkm-y += nvkm/engine/disp/ovlygf119.o
 nvkm-y += nvkm/engine/disp/ovlygk104.o
-nvkm-y += nvkm/engine/disp/ovlygp104.o
+nvkm-y += nvkm/engine/disp/ovlygp102.o
 
 nvkm-y += nvkm/engine/disp/piocnv50.o
 nvkm-y += nvkm/engine/disp/piocgf119.o
 
 #include <nvif/class.h>
 
 const struct nv50_disp_dmac_oclass
-gp104_disp_base_oclass = {
+gp102_disp_base_oclass = {
        .base.oclass = GK110_DISP_BASE_CHANNEL_DMA,
        .base.minver = 0,
        .base.maxver = 0,
        .ctor = nv50_disp_base_new,
-       .func = &gp104_disp_dmac_func,
+       .func = &gp102_disp_dmac_func,
        .mthd = &gf119_disp_base_chan_mthd,
        .chid = 1,
 };
 
 #include <nvif/class.h>
 
 static int
-gp104_disp_core_init(struct nv50_disp_dmac *chan)
+gp102_disp_core_init(struct nv50_disp_dmac *chan)
 {
        struct nv50_disp *disp = chan->base.root->disp;
        struct nvkm_subdev *subdev = &disp->base.engine.subdev;
 }
 
 static const struct nv50_disp_dmac_func
-gp104_disp_core_func = {
-       .init = gp104_disp_core_init,
+gp102_disp_core_func = {
+       .init = gp102_disp_core_init,
        .fini = gf119_disp_core_fini,
        .bind = gf119_disp_dmac_bind,
 };
 
 const struct nv50_disp_dmac_oclass
-gp104_disp_core_oclass = {
-       .base.oclass = GP104_DISP_CORE_CHANNEL_DMA,
+gp102_disp_core_oclass = {
+       .base.oclass = GP102_DISP_CORE_CHANNEL_DMA,
        .base.minver = 0,
        .base.maxver = 0,
        .ctor = nv50_disp_core_new,
-       .func = &gp104_disp_core_func,
+       .func = &gp102_disp_core_func,
        .mthd = &gk104_disp_core_chan_mthd,
        .chid = 0,
 };
 
 #include <subdev/timer.h>
 
 static int
-gp104_disp_dmac_init(struct nv50_disp_dmac *chan)
+gp102_disp_dmac_init(struct nv50_disp_dmac *chan)
 {
        struct nv50_disp *disp = chan->base.root->disp;
        struct nvkm_subdev *subdev = &disp->base.engine.subdev;
 }
 
 const struct nv50_disp_dmac_func
-gp104_disp_dmac_func = {
-       .init = gp104_disp_dmac_init,
+gp102_disp_dmac_func = {
+       .init = gp102_disp_dmac_init,
        .fini = gf119_disp_dmac_fini,
        .bind = gf119_disp_dmac_bind,
 };
 
 extern const struct nv50_disp_dmac_func gf119_disp_core_func;
 void gf119_disp_core_fini(struct nv50_disp_dmac *);
 
-extern const struct nv50_disp_dmac_func gp104_disp_dmac_func;
+extern const struct nv50_disp_dmac_func gp102_disp_dmac_func;
 
 struct nv50_disp_dmac_oclass {
        int (*ctor)(const struct nv50_disp_dmac_func *,
 
 extern const struct nv50_disp_dmac_oclass gp100_disp_core_oclass;
 
-extern const struct nv50_disp_dmac_oclass gp104_disp_core_oclass;
-extern const struct nv50_disp_dmac_oclass gp104_disp_base_oclass;
-extern const struct nv50_disp_dmac_oclass gp104_disp_ovly_oclass;
+extern const struct nv50_disp_dmac_oclass gp102_disp_core_oclass;
+extern const struct nv50_disp_dmac_oclass gp102_disp_base_oclass;
+extern const struct nv50_disp_dmac_oclass gp102_disp_ovly_oclass;
 #endif
 
 #include "rootnv50.h"
 
 static void
-gp104_disp_intr_error(struct nv50_disp *disp, int chid)
+gp102_disp_intr_error(struct nv50_disp *disp, int chid)
 {
        struct nvkm_subdev *subdev = &disp->base.engine.subdev;
        struct nvkm_device *device = subdev->device;
 }
 
 static const struct nv50_disp_func
-gp104_disp = {
+gp102_disp = {
        .intr = gf119_disp_intr,
-       .intr_error = gp104_disp_intr_error,
+       .intr_error = gp102_disp_intr_error,
        .uevent = &gf119_disp_chan_uevent,
        .super = gf119_disp_intr_supervisor,
-       .root = &gp104_disp_root_oclass,
+       .root = &gp102_disp_root_oclass,
        .head.vblank_init = gf119_disp_vblank_init,
        .head.vblank_fini = gf119_disp_vblank_fini,
        .head.scanoutpos = gf119_disp_root_scanoutpos,
 };
 
 int
-gp104_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+gp102_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
 {
-       return gf119_disp_new_(&gp104_disp, device, index, pdisp);
+       return gf119_disp_new_(&gp102_disp, device, index, pdisp);
 }
 
 #include <nvif/class.h>
 
 const struct nv50_disp_dmac_oclass
-gp104_disp_ovly_oclass = {
+gp102_disp_ovly_oclass = {
        .base.oclass = GK104_DISP_OVERLAY_CONTROL_DMA,
        .base.minver = 0,
        .base.maxver = 0,
        .ctor = nv50_disp_ovly_new,
-       .func = &gp104_disp_dmac_func,
+       .func = &gp102_disp_dmac_func,
        .mthd = &gk104_disp_ovly_chan_mthd,
        .chid = 5,
 };
 
 #include <nvif/class.h>
 
 static const struct nv50_disp_root_func
-gp104_disp_root = {
+gp102_disp_root = {
        .init = gf119_disp_root_init,
        .fini = gf119_disp_root_fini,
        .dmac = {
-               &gp104_disp_core_oclass,
-               &gp104_disp_base_oclass,
-               &gp104_disp_ovly_oclass,
+               &gp102_disp_core_oclass,
+               &gp102_disp_base_oclass,
+               &gp102_disp_ovly_oclass,
        },
        .pioc = {
                &gp102_disp_oimm_oclass,
 };
 
 static int
-gp104_disp_root_new(struct nvkm_disp *disp, const struct nvkm_oclass *oclass,
+gp102_disp_root_new(struct nvkm_disp *disp, const struct nvkm_oclass *oclass,
                    void *data, u32 size, struct nvkm_object **pobject)
 {
-       return nv50_disp_root_new_(&gp104_disp_root, disp, oclass,
+       return nv50_disp_root_new_(&gp102_disp_root, disp, oclass,
                                   data, size, pobject);
 }
 
 const struct nvkm_disp_oclass
-gp104_disp_root_oclass = {
-       .base.oclass = GP104_DISP,
+gp102_disp_root_oclass = {
+       .base.oclass = GP102_DISP,
        .base.minver = -1,
        .base.maxver = -1,
-       .ctor = gp104_disp_root_new,
+       .ctor = gp102_disp_root_new,
 };
 
 extern const struct nvkm_disp_oclass gm107_disp_root_oclass;
 extern const struct nvkm_disp_oclass gm200_disp_root_oclass;
 extern const struct nvkm_disp_oclass gp100_disp_root_oclass;
-extern const struct nvkm_disp_oclass gp104_disp_root_oclass;
+extern const struct nvkm_disp_oclass gp102_disp_root_oclass;
 #endif