]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
PCI: microchip: Rename PLDA functions to be generic
authorMinda Chen <minda.chen@starfivetech.com>
Thu, 28 Mar 2024 09:18:20 +0000 (17:18 +0800)
committerBjorn Helgaas <bhelgaas@google.com>
Tue, 28 May 2024 16:15:28 +0000 (11:15 -0500)
Rename mc_pcie_setup_window() to plda_pcie_setup_window() and
mc_pcie_setup_windows() to plda_pcie_setup_iomems() so they can be shared
by all PLDA-based drivers.

Link: https://lore.kernel.org/linux-pci/20240328091835.14797-8-minda.chen@starfivetech.com
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Signed-off-by: Krzysztof WilczyƄski <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
drivers/pci/controller/plda/pcie-microchip-host.c

index a554a56cc0e89127681250285696245da9c85d6e..9b367927cd32a3e8c7e00218c510497498b5fa22 100644 (file)
@@ -838,9 +838,9 @@ static int mc_pcie_init_irq_domains(struct plda_pcie_rp *port)
        return mc_allocate_msi_domains(port);
 }
 
-static void mc_pcie_setup_window(void __iomem *bridge_base_addr, u32 index,
-                                phys_addr_t axi_addr, phys_addr_t pci_addr,
-                                size_t size)
+static void plda_pcie_setup_window(void __iomem *bridge_base_addr, u32 index,
+                                  phys_addr_t axi_addr, phys_addr_t pci_addr,
+                                  size_t size)
 {
        u32 atr_sz = ilog2(size) - 1;
        u32 val;
@@ -876,8 +876,8 @@ static void mc_pcie_setup_window(void __iomem *bridge_base_addr, u32 index,
        writel(0, bridge_base_addr + ATR0_PCIE_WIN0_SRC_ADDR);
 }
 
-static int mc_pcie_setup_windows(struct platform_device *pdev,
-                                struct plda_pcie_rp *port)
+static int plda_pcie_setup_iomems(struct platform_device *pdev,
+                                 struct plda_pcie_rp *port)
 {
        void __iomem *bridge_base_addr = port->bridge_addr;
        struct pci_host_bridge *bridge = platform_get_drvdata(pdev);
@@ -888,9 +888,9 @@ static int mc_pcie_setup_windows(struct platform_device *pdev,
        resource_list_for_each_entry(entry, &bridge->windows) {
                if (resource_type(entry->res) == IORESOURCE_MEM) {
                        pci_addr = entry->res->start - entry->offset;
-                       mc_pcie_setup_window(bridge_base_addr, index,
-                                            entry->res->start, pci_addr,
-                                            resource_size(entry->res));
+                       plda_pcie_setup_window(bridge_base_addr, index,
+                                              entry->res->start, pci_addr,
+                                              resource_size(entry->res));
                        index++;
                }
        }
@@ -1023,15 +1023,15 @@ static int mc_platform_init(struct pci_config_window *cfg)
        int ret;
 
        /* Configure address translation table 0 for PCIe config space */
-       mc_pcie_setup_window(bridge_base_addr, 0, cfg->res.start,
-                            cfg->res.start,
-                            resource_size(&cfg->res));
+       plda_pcie_setup_window(bridge_base_addr, 0, cfg->res.start,
+                              cfg->res.start,
+                              resource_size(&cfg->res));
 
        /* Need some fixups in config space */
        mc_pcie_enable_msi(port, cfg->win);
 
        /* Configure non-config space outbound ranges */
-       ret = mc_pcie_setup_windows(pdev, &port->plda);
+       ret = plda_pcie_setup_iomems(pdev, &port->plda);
        if (ret)
                return ret;