drm/bridge: tc358775: Configure hs_rate and lp_rate

The hs_rate and lp_rate may be used by the dsi host for timing
calculations. The tc358775 has a maximum bit rate of 1 Gbps/lane,
tc358765 has maximurate of 800 Mbps per lane.

Reviewed-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Robert Foss <rfoss@kernel.org>
Signed-off-by: Robert Foss <rfoss@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240225062008.33191-11-tony@atomide.com

diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc358775.c
index 17a91510019b8d6f1ab24e05baf3b7808c89b353..3b7cc3be2ccdbea1542a08580677fad13f4368f0 100644 (file)
--- a/drivers/gpu/drm/bridge/tc358775.c
+++ b/drivers/gpu/drm/bridge/tc358775.c
@@ -635,6 +635,19 @@ static int tc_attach_host(struct tc_data *tc)
        dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
                          MIPI_DSI_MODE_LPM;
 
+       /*
+        * The hs_rate and lp_rate are data rate values. The HS mode is
+        * differential, while the LP mode is single ended. As the HS mode
+        * uses DDR, the DSI clock frequency is half the hs_rate. The 10 Mbs
+        * data rate for LP mode is not specified in the bridge data sheet,
+        * but seems to be part of the MIPI DSI spec.
+        */
+       if (tc->type == TC358765)
+               dsi->hs_rate = 800000000;
+       else
+               dsi->hs_rate = 1000000000;
+       dsi->lp_rate = 10000000;
+
        ret = devm_mipi_dsi_attach(dev, dsi);
        if (ret < 0) {
                dev_err(dev, "failed to attach dsi to host\n");