#include <asm/debugreg.h>
 #include <asm/desc.h>
 #include <asm/fpu/api.h>
+#include <asm/fpu/xstate.h>
 #include <asm/idtentry.h>
 #include <asm/io.h>
 #include <asm/irq_remapping.h>
                vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, match);
        }
 
+       /*
+        * Trap #NM if guest xfd contains a non-zero value so guest XFD_ERR
+        * can be saved timely.
+        */
+       if (vcpu->arch.guest_fpu.fpstate->xfd)
+               eb |= (1u << NM_VECTOR);
+
        vmcs_write32(EXCEPTION_BITMAP, eb);
 }
 
        case MSR_KERNEL_GS_BASE:
                vmx_write_guest_kernel_gs_base(vmx, data);
                break;
+       case MSR_IA32_XFD:
+               ret = kvm_set_msr_common(vcpu, msr_info);
+               /* Update #NM interception according to guest xfd */
+               if (!ret)
+                       vmx_update_exception_bitmap(vcpu);
+               break;
 #endif
        case MSR_IA32_SYSENTER_CS:
                if (is_guest_mode(vcpu))
        if (is_machine_check(intr_info) || is_nmi(intr_info))
                return 1; /* handled by handle_exception_nmi_irqoff() */
 
+       /*
+        * Queue the exception here instead of in handle_nm_fault_irqoff().
+        * This ensures the nested_vmx check is not skipped so vmexit can
+        * be reflected to L1 (when it intercepts #NM) before reaching this
+        * point.
+        */
+       if (is_nm_fault(intr_info)) {
+               kvm_queue_exception(vcpu, NM_VECTOR);
+               return 1;
+       }
+
        if (is_invalid_opcode(intr_info))
                return handle_ud(vcpu);
 
        kvm_after_interrupt(vcpu);
 }
 
+static void handle_nm_fault_irqoff(struct kvm_vcpu *vcpu)
+{
+       /*
+        * Save xfd_err to guest_fpu before interrupt is enabled, so the
+        * MSR value is not clobbered by the host activity before the guest
+        * has chance to consume it.
+        *
+        * Do not blindly read xfd_err here, since this exception might
+        * be caused by L1 interception on a platform which doesn't
+        * support xfd at all.
+        *
+        * Do it conditionally upon guest_fpu::xfd. xfd_err matters
+        * only when xfd contains a non-zero value.
+        *
+        * Queuing exception is done in vmx_handle_exit. See comment there.
+        */
+       if (vcpu->arch.guest_fpu.fpstate->xfd)
+               rdmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
+}
+
 static void handle_exception_nmi_irqoff(struct vcpu_vmx *vmx)
 {
        const unsigned long nmi_entry = (unsigned long)asm_exc_nmi_noist;
        /* if exit due to PF check for async PF */
        if (is_page_fault(intr_info))
                vmx->vcpu.arch.apf.host_apf_flags = kvm_read_and_reset_apf_flags();
+       /* if exit due to NM, handle before interrupts are enabled */
+       else if (is_nm_fault(intr_info))
+               handle_nm_fault_irqoff(&vmx->vcpu);
        /* Handle machine checks before interrupts are enabled */
        else if (is_machine_check(intr_info))
                kvm_machine_check();
 
        if (test_thread_flag(TIF_NEED_FPU_LOAD))
                switch_fpu_return();
 
+       if (vcpu->arch.guest_fpu.xfd_err)
+               wrmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
+
        if (unlikely(vcpu->arch.switch_db_regs)) {
                set_debugreg(0, 7);
                set_debugreg(vcpu->arch.eff_db[0], 0);
 
        static_call(kvm_x86_handle_exit_irqoff)(vcpu);
 
+       if (vcpu->arch.guest_fpu.xfd_err)
+               wrmsrl(MSR_IA32_XFD_ERR, 0);
+
        /*
         * Consume any pending interrupts, including the possible source of
         * VM-Exit on SVM and any ticks that occur between VM-Exit and now.