SND_SOC_RBTREE_COMPRESSION
 };
 
+int snd_soc_codec_set_sysclk(struct snd_soc_codec *codec, int clk_id,
+                            unsigned int freq, int dir);
+int snd_soc_codec_set_pll(struct snd_soc_codec *codec, int pll_id, int source,
+                         unsigned int freq_in, unsigned int freq_out);
+
 int snd_soc_register_card(struct snd_soc_card *card);
 int snd_soc_unregister_card(struct snd_soc_card *card);
 int snd_soc_suspend(struct device *dev);
        const struct snd_soc_dapm_route *dapm_routes;
        int num_dapm_routes;
 
+       /* codec wide operations */
+       int (*set_sysclk)(struct snd_soc_codec *codec,
+                         int clk_id, unsigned int freq, int dir);
+       int (*set_pll)(struct snd_soc_codec *codec, int pll_id, int source,
+               unsigned int freq_in, unsigned int freq_out);
+
        /* codec IO */
        unsigned int (*read)(struct snd_soc_codec *, unsigned int);
        int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
 
 {
        if (dai->driver && dai->driver->ops->set_sysclk)
                return dai->driver->ops->set_sysclk(dai, clk_id, freq, dir);
+       else if (dai->codec && dai->codec->driver->set_sysclk)
+               return dai->codec->driver->set_sysclk(dai->codec, clk_id,
+                                                     freq, dir);
        else
                return -EINVAL;
 }
 EXPORT_SYMBOL_GPL(snd_soc_dai_set_sysclk);
 
+/**
+ * snd_soc_codec_set_sysclk - configure CODEC system or master clock.
+ * @codec: CODEC
+ * @clk_id: DAI specific clock ID
+ * @freq: new clock frequency in Hz
+ * @dir: new clock direction - input/output.
+ *
+ * Configures the CODEC master (MCLK) or system (SYSCLK) clocking.
+ */
+int snd_soc_codec_set_sysclk(struct snd_soc_codec *codec, int clk_id,
+       unsigned int freq, int dir)
+{
+       if (codec->driver->set_sysclk)
+               return codec->driver->set_sysclk(codec, clk_id, freq, dir);
+       else
+               return -EINVAL;
+}
+EXPORT_SYMBOL_GPL(snd_soc_codec_set_sysclk);
+
 /**
  * snd_soc_dai_set_clkdiv - configure DAI clock dividers.
  * @dai: DAI
        if (dai->driver && dai->driver->ops->set_pll)
                return dai->driver->ops->set_pll(dai, pll_id, source,
                                         freq_in, freq_out);
+       else if (dai->codec && dai->codec->driver->set_pll)
+               return dai->codec->driver->set_pll(dai->codec, pll_id, source,
+                                                  freq_in, freq_out);
        else
                return -EINVAL;
 }
 EXPORT_SYMBOL_GPL(snd_soc_dai_set_pll);
 
+/*
+ * snd_soc_codec_set_pll - configure codec PLL.
+ * @codec: CODEC
+ * @pll_id: DAI specific PLL ID
+ * @source: DAI specific source for the PLL
+ * @freq_in: PLL input clock frequency in Hz
+ * @freq_out: requested PLL output clock frequency in Hz
+ *
+ * Configures and enables PLL to generate output clock based on input clock.
+ */
+int snd_soc_codec_set_pll(struct snd_soc_codec *codec, int pll_id, int source,
+                         unsigned int freq_in, unsigned int freq_out)
+{
+       if (codec->driver->set_pll)
+               return codec->driver->set_pll(codec, pll_id, source,
+                                             freq_in, freq_out);
+       else
+               return -EINVAL;
+}
+EXPORT_SYMBOL_GPL(snd_soc_codec_set_pll);
+
 /**
  * snd_soc_dai_set_fmt - configure DAI hardware audio format.
  * @dai: DAI