TP_ARGS(mapping)
 );
 
-TRACE_EVENT(amdgpu_vm_set_page,
+TRACE_EVENT(amdgpu_vm_set_ptes,
            TP_PROTO(uint64_t pe, uint64_t addr, unsigned count,
                     uint32_t incr, uint32_t flags),
            TP_ARGS(pe, addr, count, incr, flags),
                      __entry->flags, __entry->count)
 );
 
+TRACE_EVENT(amdgpu_vm_copy_ptes,
+           TP_PROTO(uint64_t pe, uint64_t src, unsigned count),
+           TP_ARGS(pe, src, count),
+           TP_STRUCT__entry(
+                            __field(u64, pe)
+                            __field(u64, src)
+                            __field(u32, count)
+                            ),
+
+           TP_fast_assign(
+                          __entry->pe = pe;
+                          __entry->src = src;
+                          __entry->count = count;
+                          ),
+           TP_printk("pe=%010Lx, src=%010Lx, count=%u",
+                     __entry->pe, __entry->src, __entry->count)
+);
+
 TRACE_EVENT(amdgpu_vm_flush,
            TP_PROTO(uint64_t pd_addr, unsigned ring, unsigned id),
            TP_ARGS(pd_addr, ring, id),
 
                                  unsigned count, uint32_t incr,
                                  uint32_t flags)
 {
-       trace_amdgpu_vm_set_page(pe, addr, count, incr, flags);
+       trace_amdgpu_vm_set_ptes(pe, addr, count, incr, flags);
 
        if (count < 3) {
                amdgpu_vm_write_pte(params->adev, params->ib, pe,
                                   unsigned count, uint32_t incr,
                                   uint32_t flags)
 {
-       trace_amdgpu_vm_set_page(pe, addr, count, incr, flags);
+       uint64_t src = (params->src + (addr >> 12) * 8);
 
-       amdgpu_vm_copy_pte(params->adev, params->ib, pe,
-                          (params->src + (addr >> 12) * 8), count);
+
+       trace_amdgpu_vm_copy_ptes(pe, src, count);
+
+       amdgpu_vm_copy_pte(params->adev, params->ib, pe, src, count);
 }
 
 /**