x86/msr: Rename 'mce_rdmsrl()' to 'mce_rdmsrq()'

Suggested-by: "H. Peter Anvin" <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Juergen Gross <jgross@suse.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Xin Li <xin@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>

diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index c2740248b85263f0ea8a047889c29e47d6ac35cb..765b799c70907bb726e11c63cc83add2c6932b0b 100644 (file)
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -388,7 +388,7 @@ void ex_handler_msr_mce(struct pt_regs *regs, bool wrmsr)
 }
 
 /* MSR access wrappers used for error injection */
-noinstr u64 mce_rdmsrl(u32 msr)
+noinstr u64 mce_rdmsrq(u32 msr)
 {
        DECLARE_ARGS(val, low, high);
 
@@ -444,7 +444,7 @@ static noinstr void mce_wrmsrl(u32 msr, u64 v)
        low  = (u32)v;
        high = (u32)(v >> 32);
 
-       /* See comment in mce_rdmsrl() */
+       /* See comment in mce_rdmsrq() */
        asm volatile("1: wrmsr\n"
                     "2:\n"
                     _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_WRMSR_IN_MCE)
@@ -468,7 +468,7 @@ static noinstr void mce_gather_info(struct mce_hw_err *err, struct pt_regs *regs
        instrumentation_end();
 
        m = &err->m;
-       m->mcgstatus = mce_rdmsrl(MSR_IA32_MCG_STATUS);
+       m->mcgstatus = mce_rdmsrq(MSR_IA32_MCG_STATUS);
        if (regs) {
                /*
                 * Get the address of the instruction at the time of
@@ -488,7 +488,7 @@ static noinstr void mce_gather_info(struct mce_hw_err *err, struct pt_regs *regs
                }
                /* Use accurate RIP reporting if available. */
                if (mca_cfg.rip_msr)
-                       m->ip = mce_rdmsrl(mca_cfg.rip_msr);
+                       m->ip = mce_rdmsrq(mca_cfg.rip_msr);
        }
 }
 
@@ -684,10 +684,10 @@ static noinstr void mce_read_aux(struct mce_hw_err *err, int i)
        struct mce *m = &err->m;
 
        if (m->status & MCI_STATUS_MISCV)
-               m->misc = mce_rdmsrl(mca_msr_reg(i, MCA_MISC));
+               m->misc = mce_rdmsrq(mca_msr_reg(i, MCA_MISC));
 
        if (m->status & MCI_STATUS_ADDRV) {
-               m->addr = mce_rdmsrl(mca_msr_reg(i, MCA_ADDR));
+               m->addr = mce_rdmsrq(mca_msr_reg(i, MCA_ADDR));
 
                /*
                 * Mask the reported address by the reported granularity.
@@ -702,12 +702,12 @@ static noinstr void mce_read_aux(struct mce_hw_err *err, int i)
        }
 
        if (mce_flags.smca) {
-               m->ipid = mce_rdmsrl(MSR_AMD64_SMCA_MCx_IPID(i));
+               m->ipid = mce_rdmsrq(MSR_AMD64_SMCA_MCx_IPID(i));
 
                if (m->status & MCI_STATUS_SYNDV) {
-                       m->synd = mce_rdmsrl(MSR_AMD64_SMCA_MCx_SYND(i));
-                       err->vendor.amd.synd1 = mce_rdmsrl(MSR_AMD64_SMCA_MCx_SYND1(i));
-                       err->vendor.amd.synd2 = mce_rdmsrl(MSR_AMD64_SMCA_MCx_SYND2(i));
+                       m->synd = mce_rdmsrq(MSR_AMD64_SMCA_MCx_SYND(i));
+                       err->vendor.amd.synd1 = mce_rdmsrq(MSR_AMD64_SMCA_MCx_SYND1(i));
+                       err->vendor.amd.synd2 = mce_rdmsrq(MSR_AMD64_SMCA_MCx_SYND2(i));
                }
        }
 }
@@ -753,7 +753,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
                m->bank = i;
 
                barrier();
-               m->status = mce_rdmsrl(mca_msr_reg(i, MCA_STATUS));
+               m->status = mce_rdmsrq(mca_msr_reg(i, MCA_STATUS));
 
                /*
                 * Update storm tracking here, before checking for the
@@ -887,8 +887,8 @@ quirk_sandybridge_ifu(int bank, struct mce *m, struct pt_regs *regs)
  */
 static noinstr bool quirk_skylake_repmov(void)
 {
-       u64 mcgstatus   = mce_rdmsrl(MSR_IA32_MCG_STATUS);
-       u64 misc_enable = mce_rdmsrl(MSR_IA32_MISC_ENABLE);
+       u64 mcgstatus   = mce_rdmsrq(MSR_IA32_MCG_STATUS);
+       u64 misc_enable = mce_rdmsrq(MSR_IA32_MISC_ENABLE);
        u64 mc1_status;
 
        /*
@@ -899,7 +899,7 @@ static noinstr bool quirk_skylake_repmov(void)
            !(misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING))
                return false;
 
-       mc1_status = mce_rdmsrl(MSR_IA32_MCx_STATUS(1));
+       mc1_status = mce_rdmsrq(MSR_IA32_MCx_STATUS(1));
 
        /* Check for a software-recoverable data fetch error. */
        if ((mc1_status &
@@ -955,7 +955,7 @@ static __always_inline int mce_no_way_out(struct mce_hw_err *err, char **msg, un
        int i;
 
        for (i = 0; i < this_cpu_read(mce_num_banks); i++) {
-               m->status = mce_rdmsrl(mca_msr_reg(i, MCA_STATUS));
+               m->status = mce_rdmsrq(mca_msr_reg(i, MCA_STATUS));
                if (!(m->status & MCI_STATUS_VAL))
                        continue;
 
@@ -1335,7 +1335,7 @@ __mc_scan_banks(struct mce_hw_err *err, struct pt_regs *regs,
                m->addr = 0;
                m->bank = i;
 
-               m->status = mce_rdmsrl(mca_msr_reg(i, MCA_STATUS));
+               m->status = mce_rdmsrq(mca_msr_reg(i, MCA_STATUS));
                if (!(m->status & MCI_STATUS_VAL))
                        continue;
 

diff --git a/arch/x86/kernel/cpu/mce/internal.h b/arch/x86/kernel/cpu/mce/internal.h
index 95a504ece43e8312f451314bb1baefeba3efaafd..b5ba598e54cb48dca1f4e215bcfaf24b7d6b2408 100644 (file)
--- a/arch/x86/kernel/cpu/mce/internal.h
+++ b/arch/x86/kernel/cpu/mce/internal.h
@@ -312,7 +312,7 @@ static __always_inline void pentium_machine_check(struct pt_regs *regs) {}
 static __always_inline void winchip_machine_check(struct pt_regs *regs) {}
 #endif
 
-noinstr u64 mce_rdmsrl(u32 msr);
+noinstr u64 mce_rdmsrq(u32 msr);
 
 static __always_inline u32 mca_msr_reg(int bank, enum mca_msr reg)
 {